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DS90C363B PDF预览

DS90C363B

更新时间: 2024-09-30 11:11:03
品牌 Logo 应用领域
德州仪器 - TI 光电二极管显示器
页数 文件大小 规格书
21页 702K
描述
+3.3V 可编程 LVDS 发送器 18 位平板显示器 (FPD) 链路 - 65MHz

DS90C363B 数据手册

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DS90C363B  
www.ti.com  
SNLS179F APRIL 2004REVISED APRIL 2013  
+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz  
Check for Samples: DS90C363B  
1
FEATURES  
DESCRIPTION  
The DS90C363B transmitter converts 21 bits of  
CMOS/TTL data into three LVDS (Low Voltage  
Differential Signaling) data streams. A phase-locked  
transmit clock is transmitted in parallel with the data  
streams over a fourth LVDS link. Every cycle of the  
transmit clock 21 bits of input data are sampled and  
transmitted. At a transmit clock frequency of 65 MHz,  
18 bits of RGB data and 3 bits of LCD timing and  
control data (FPLINE, FPFRAME, DRDY) are  
transmitted at a rate of 455 Mbps per LVDS data  
channel. Using a 65 MHz clock, the data throughput  
is 170 Mbytes/sec. The DS90C363B transmitter can  
be programmed for Rising edge strobe or Falling  
edge strobe through a dedicated pin. A Rising edge  
or Falling edge strobe transmitter will interoperate  
with a Falling edge strobe Receiver (DS90CF366)  
without any translation logic.  
23  
No special start-up sequence required  
between clock/data and /PD pins. Input signal  
(clock and data) can be applied either before  
or after the device is powered.  
Support Spread Spectrum Clocking up to  
100kHz frequency modulation and deviations  
of ±2.5% center spread or 5% down spread.  
"Input Clock Detection" feature will pull all  
LVDS pairs to logic low when input clock is  
missing and when /PD pin is logic high.  
18 to 68 MHz shift clock support  
Best–in–Class Set & Hold Times on TxINPUTs  
Tx power consumption < 130 mW (typ) at  
65MHz Grayscale  
40% Less Power Dissipation than BiCMOS  
Alternatives  
This chipset is an ideal means to solve EMI and  
cable size problems associated with wide, high speed  
TTL interfaces.  
Tx Power-down mode < 37μW (typ)  
Supports VGA, SVGA, XGA and Dual Pixel  
SXGA.  
Narrow bus reduces cable size and cost  
Up to 1.3 Gbps throughput  
Up to 170 Megabytes/sec bandwidth  
345 mV (typ) swing LVDS devices for low EMI  
PLL requires no external components  
Compatible with TIA/EIA-644 LVDS standard  
Low profile 48-lead TSSOP package  
Improved replacement for:  
SN75LVDS84, DS90C363A  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
TRI-STATE is a registered trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2013, Texas Instruments Incorporated  

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