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DS75208N PDF预览

DS75208N

更新时间: 2024-11-04 21:54:43
品牌 Logo 应用领域
美国国家半导体 - NSC 接口集成电路光电二极管输入元件
页数 文件大小 规格书
10页 180K
描述
Dual Line Receivers

DS75208N 数据手册

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January 1996  
DS55107/DS75107/DS75108/DS75208  
Dual Line Receivers  
General Description  
a
sup-  
The products described herein are TTL compatible dual  
high speed circuits intended for sensing in a broad range of  
system applications. While the primary usage will be for line  
receivers of MOS sensing, any of the products may effec-  
tively be used as voltage comparators, level translators,  
window detectors, transducer preamplifiers, and in other  
sensing applications. As digital line receivers the products  
are applicable with the SN55109/SN75109 and mA75110/  
DS75110 companion drivers, or may be used in other bal-  
anced or unbalanced party-line data transmission systems.  
The improved input sensitivity and delay specifications of  
the DS75208 make it ideal for sensing high performance  
MOS memories as well as high sensitivity line receivers and  
voltage comparators.  
useful in certain applications that have multiple V  
CC  
a
plies or V  
supplies that are turned off.  
CC  
Features  
Y
Diode protected input stage for power ‘‘OFF’’ condition  
Y
Y
Y
Y
Y
Y
Y
Y
Y
17 ns typ high speed  
TTL compatible  
g
g
g
10 mV or 25 mV input sensitivity  
3V input common-mode range  
e
High input impedance with normal V , or V  
CC  
0V  
CC  
Strobes for channel selection  
Dual circuits  
Sensitivity gntd. over full common-mode range  
Input protection diodes are incorporated in series with the  
collectors of the differential input stage. These diodes are  
Logic input clamp diodesÐmeets both ‘‘A’’ and ‘‘B’’  
version specifications  
Y
g
5V standard supply voltages  
Connection Diagram  
Dual-In-Line Package  
TL/F/9446–1  
Top View  
Order Number DS75107M, DS75107N, DS75107AM, DS75107AN,  
DS75108M, DS75108N or DS75208N  
See NS Package Number M14A or N14A  
For Complete Military 883 Specifications, see RETS Datasheet.  
Order Number DS55107AJ/883  
See NS Package Number J14A  
Selection Guide  
s
Cavity Dip  
s
s
s
a
T
A
b
a
55 C  
§
T
A
125 C  
§
0 C  
§
70 C  
§
TempPearcaktaugreex  
x
Input Sensitivityx  
Cavity or Molded Dip  
g
g
g
10 mV  
25 mV  
25 mV  
Output Logic  
v
TTL Active Pull-Up  
TTL Open Collector  
DS55107  
DS75107  
DS75108 DS75208  
C
1996 National Semiconductor Corporation  
TL/F/9446  
RRD-B30M36/Printed in U. S. A.  
http://www.national.com  

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