February 1996
DS75160A/DS75161A/DS75162A
IEEE-488 GPIB Transceivers
General Description
Features
Y
8-channel bi-directional non-inverting transceivers
This family of high-speed-Schottky 8-channel bi-directional
transceivers is designed to interface TTL/MOS logic to the
IEEE Standard 488-1978 General Purpose Interface Bus
(GPIB). PNP inputs are used at all driver inputs for minimum
loading, and hysteresis is provided at all receiver inputs for
added noise margin. The IEEE-488 required bus termination
is provided internally with an active turn-off feature which
Y
Bi-directional control implemented with TRI-STATE
output design
É
Y
Y
Y
Y
Y
Y
Y
Y
Meets IEEE Standard 488-1978
High-speed Schottky design
Low power consumption
High impedance PNP inputs (drivers)
500 mV (typ) input hysteresis (receivers)
On-chip bus terminators
disconnects the termination from the bus when V
moved.
is re-
CC
The General Purpose Interface Bus is comprised of 16 sig-
nal lines Ð 8 for data and 8 for interface management. The
data lines are always implemented with DS75160A, and the
management lines are either implemented with DS75161A
in a single-controller system, or with DS75162A in a multi-
controller system.
No bus loading when V
is removed
CC
Pin selectable open collector mode on DS75160A driv-
er outputs
Y
Accommodates multi-controller systems
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL/F/5804–15
Order Number DS75162AWM, DS75162AN
See NS Package Number M24B or N24B
Dual In-Line Package
TL/F/5804–1
Top View
Order Number DS75160AN or DS75160AWM
See NS Package Number M20B or N20A
TL/F/5804–16
Order Number DS75161AN or DS75161AWM
See NS Package Number M20B or N20B
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1996 National Semiconductor Corporation
TL/F/5804
RRD-B30M36/Printed in U. S. A.
http://www.national.com