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DS64BR401SQ PDF预览

DS64BR401SQ

更新时间： 2024-02-13 22:57:26
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
30页 1943K
描述
Quad Bi-Directional Transceiver with Equalization and De-Emphasis

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中文翻译

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DS64BR401SQ 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：HVQCCN, LCC54,.2X.4,20Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.31差分输出：YES
驱动器位数：4输入特性：DIFFERENTIAL
接口集成电路类型：LINE TRANSCEIVER接口标准：GENERAL PURPOSE
JESD-30 代码：R-XQCC-N54JESD-609代码：e3
长度：10 mm湿度敏感等级：2
功能数量：4端子数量：54
最高工作温度：85 °C最低工作温度：-10 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC54,.2X.4,20封装形状：RECTANGULAR
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：2.5 V认证状态：Not Qualified
最大接收延迟：0.25 ns接收器位数：4
座面最大高度：0.8 mm子类别：Line Driver or Receivers
最大供电电压：2.625 V最小供电电压：2.375 V
标称供电电压：2.5 V表面贴装：YES
温度等级：OTHER端子面层：Matte Tin (Sn)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
最大传输延迟：0.25 ns宽度：5.5 mm
Base Number Matches：1

DS64BR401SQ 数据手册

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June 25, 2009  
DS64BR401  
Quad Bi-Directional Transceiver with Equalization and  
De-Emphasis  
General Description  
Features  
The DS64BR401 is a quad lane bi-directional signal condi-  
tioning transceiver suitable for 6.0/3.0/1.5 Gbps SATA/SAS  
and other high-speed bus applications with data rates up to  
6.4 Gbps. The device performs both receive equalization and  
transmit de-emphasis on each of its 8 channels to compen-  
sate for channel loss, allowing maximum flexibility of physical  
placement within a system. The receiver's continuous time  
linear equalizer (CTLE) provides a boost of up to +33 dB at 3  
GHz and is capable of opening an input eye that is completely  
closed due to inter-symbol interference (ISI) induced by the  
Quad lane bi-directional transceiver up to 6.4 Gbps rate  
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Signal conditioning on input and output for extended reach  
Adjustable receive equalization up to +33 dB gain  
Adjustable transmit de-emphasis up to −12 dB  
Adjustable transmit VOD (600 mVp-p to 1200 mVp-p)  
<0.25 UI of residual DJ at 6.4 Gbps with 40” FR4 trace  
Automatic de-emphasis scaling based on rate detect  
SATA/SAS: OOB signal pass-through,  
<3 ns (typ) envelope distortion  
interconnect medium. The transmitter features  
a pro-  
Adjustable electrical IDLE detect threshold  
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grammable output de-emphasis driver and allows amplitude  
voltage levels to be selected from 600 mVp-p to 1200 mVp-p  
to suit multiple application scenarios. This Low Power Differ-  
ential Signaling (LPDS) output driver is a power efficient  
implementation that maintains compatibility with AC coupled  
CML receiver. The programmable settings can be applied via  
pin settings or SMBus interface.  
Low power (100 mW/channel), per-channel power down  
Programmable via pin selection or SMBus interface  
Single supply operation at 2.5V ±5%  
>6 kV HBM ESD Rating  
3.3V LVCMOS input tolerant for SMBus interface  
High speed signal flow–thru pinout package: 54-pin LLP  
(10 mm x 5.5 mm)  
To enable seamless upgrade from SAS/SATA 3.0 Gbps to 6.0  
Gbps data rates without compromising physical reach,  
DS64BR401 automatically detects the incoming data rate and  
selects the optimal de-emphasis pulse width. The device de- Applications  
tects the out-of-band (OOB) idle and active signals of the  
SAS/SATA specification and passes through with minimum  
signal distortion.  
SATA (1.5, 3.0 and 6 Gbps)  
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SAS (1.5, 3.0 and 6 Gbps)  
XAUI (3.125 Gbps), RXAUI (6.25 Gbps)  
sRIO – Serial Rapid I/O  
With a typical power consumption of 200 mW/lane (100 mW/  
channel) at 6.4 Gbps, and control to turn-off unused channels,  
the DS64BR401 is part of National's PowerWise family of en-  
ergy efficient devices.  
Fibre Channel (4.25 Gbps)  
10GBase-CX4, InfiniBand 4x (SDR & DDR)  
QSFP active copper cable modules  
High-speed active cable and FR-4 backplane traces  
Typical Cable Application  
30073081  
© 2009 National Semiconductor Corporation  
300730  
www.national.com  
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DS64BR401SQ 替代型号

型号 品牌 替代类型 描述 数据表
DS64BR401SQE NSC

功能相似

 Quad Bi-Directional Transceiver with Equalization and De-Emphasis

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