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DS3862WMX PDF预览

DS3862WMX

更新时间: 2024-11-23 19:01:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
7页 225K
描述
OCTAL LINE TRANSCEIVER, PDSO20, 0.300 INCH, PLASTIC, SOP-20

DS3862WMX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP,Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.65差分输出:NO
驱动器位数:8输入特性:STANDARD
接口集成电路类型:LINE TRANSCEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.8 mm功能数量:8
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:OPEN-COLLECTOR
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
最大接收延迟:25 ns接收器位数:8
座面最大高度:2.65 mm最大压摆率:135 mA
表面贴装:YES技术:BIPOLAR
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL最大传输延迟:20 ns
宽度:7.5 mmBase Number Matches:1

DS3862WMX 数据手册

 浏览型号DS3862WMX的Datasheet PDF文件第2页浏览型号DS3862WMX的Datasheet PDF文件第3页浏览型号DS3862WMX的Datasheet PDF文件第4页浏览型号DS3862WMX的Datasheet PDF文件第5页浏览型号DS3862WMX的Datasheet PDF文件第6页浏览型号DS3862WMX的Datasheet PDF文件第7页 
February 1995  
DS3862  
Octal High Speed Trapezoidal Bus Transceiver  
General Description  
Features  
n Guaranteed A.C. specifications on noise immunity and  
propagation delay over the specified temperature and  
supply voltage range  
The DS3862 is an octal high speed schottky bus transceiver  
intended for use with terminated 120impedance lines. It is  
specifically designed to reduce noise in unbalanced trans-  
mission systems. The open collector drivers generate pre-  
cise trapezoidal waveforms with rise and fall times of 9 ns  
(typical), which are relatively independent of capacitive load-  
ing conditions on the outputs. This reduces noise coupling to  
the adjacent lines without any appreciable impact on the  
maximum data rate obtainable with high speed bus trans-  
ceivers. In addition, the receivers use a low pass filter in con-  
junction with a high speed comparator, to further enhance  
the noise immunity. Tightly controlled threshold levels on the  
receiver provide equal rejection to both negative and positive  
going noise pulses on the bus.  
n Temperature insensitive receiver thresholds track bus  
logic level and respond symmetrically to positive and  
negative going pulses  
n Trapezoidal bus waveforms reduce noise coupling to  
adjacent lines  
n Open collector driver output allows wire-or connection  
n Advanced low power schottky technology  
n Glitch free power up/down protection on driver and  
receiver outputs  
n TTL compatible driver and control inputs, and receiver  
outputs  
The external termination is intended to be a 180resistor  
from the bus to 5V logic supply, together with a 390resistor  
from the bus to ground. The bus can be terminated at one or  
both ends.  
n Control logic is the same as the DS3896  
Logic and Connection Diagram  
DS008539-1  
Order Number DS3862J, DS3862N or DS3862WM  
See NS Package Number J20A, N20A or M20B  
© 1999 National Semiconductor Corporation  
DS008539  
www.national.com  

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