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DS36C280

更新时间： 2024-11-05 22:49:07

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
10页	172K
描述
Slew Rate Controlled CMOS EIA-RS-485 Transceiver

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DS36C280 数据手册

July 1998

DS36C280

Slew Rate Controlled CMOS EIA-RS-485 Transceiver

General Description

Features

n 100% RS-485 compliant

The DS36C280 is a low power differential bus/line trans-

ceiver designed to meet the requirements of RS-485 Stan-

dard for multipoint data transmission. In addition, it is com-

patible with TIA/EIA-422-B.

— Guaranteed RS-485 device interoperation

n Low power CMOS design: I_CC500 µA max

n Adjustable slew rate control

— Minimizes EMI affects

n Built-in power up/down glitch-free circuitry

— Permits live transceiver insertion/displacement

The slew rate control feature allows the user to set the driver

rise and fall times by using an external resistor. Controlled

edge rates can reduce switching EMI.

n DIP and SOIC packages available

The CMOS design offers significant power savings over its

bipolar and ALS counterparts without sacrificing ruggedness

against ESD damage. The device is ideal for use in battery

powered or power conscious applications. I_CCis specified at

500 µA maximum.

n Industrial temperature range: −40˚C to +85˚C

n On-board thermal shutdown circuitry

— Prevents damage to the device in the event of

excessive power dissipation

The driver and receiver outputs feature TRI-STATE^®capabil-

ity. The driver outputs operate over the entire common mode

range of −7V to +12V. Bus contention or fault situations are

handled by a thermal shutdown circuit, which forces the

driver outputs into the high impedance state.

n Wide common mode range: −7V to +12V

n Receiver open input fail-safe (Note 1)

⁄

unit load (DS36C280): ≥128 nodes

unit load (DS36C280T): ≥64 nodes

n ESD (human body model): ≥2 kV

The receiver incorporates a fail safe circuit which guarantees

a high output state when the inputs are left open (Note 1) .

Connection and Logic Diagram

Truth Table

DRIVER SECTION

DE/RE*

DO/RI

DO*/RI*

RECEIVER SECTION

DE/RE*

RI-RI*

≥+0.2V

≤−0.2V

OPEN (Note 1)

DS012052-1

Note 1: Non-terminated, Open Inputs only

Order Number DS36C280TM, DS36C280TN

DS36C280M and DS36C280N

See NS Package Number M08A or N08E

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

DS012052

www.national.com

12 3 4 5 6 7...10

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与DS36C280相关器件

型号	品牌	获取价格	描述	数据表
DS36C280_00	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280_14	TI	获取价格	DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280M	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280M/NOPB	TI	获取价格	Slew Rate Controlled CMOS TIA/EIA-485 Transceiver 8-SOIC 0 to 70
DS36C280MX	TI	获取价格	LINE TRANSCEIVER, PDSO8, 0.150 INCH, SOIC-8
DS36C280MX/NOPB	NSC	获取价格	IC LINE TRANSCEIVER, PDSO8, 0.150 INCH, PLASTIC, SOIC-8, Line Driver or Receiver
DS36C280MX/NOPB	TI	获取价格	DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280N	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280TM	TI	获取价格	LINE TRANSCEIVER, PDSO8, 0.150 INCH, SOIC-8
DS36C280TM	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver

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