Rev 1; 10/08
2
I C Gamma and V
Buffer with EEPROM
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DS3514
General Description
Features
The DS3514 is a programmable gamma and V
volt-
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♦ 10-Bit Gamma Buffers, 14 Channels
♦ 8-Bit V Buffer, 1 Channel
age generator that supports both real-time updating as
well as multibyte storage of gamma/V data in on-
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chip EEPROM memory. An independent 10-bit DAC, two
10-bit data registers, and four words of EEPROM memo-
ry are provided for each individually addressable
♦ Four 10-Bit EEPROM Words per Channel
♦ Low-Power 400µA/ch Gamma Buffers
gamma or V
channel. High-performance buffer
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♦ I C-Compatible Serial Interface
amplifiers are integrated on-chip, providing rail-to-rail,
low-power (400µA/gamma channel) operation. The
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♦ Flexible Control from I C or Pins
V
channel features a high current drive (> 250mA
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♦ 9.0V to 15.0V Analog Supply
♦ 2.7V to 5.5V Digital Supply
peak) and a fast-settling buffer amplifier optimized to
drive the V
node of a wide range of TFT-LCD panels.
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Programming occurs through an I C-compatible serial
interface. Interface performance and flexibility are
enhanced by a pair of independently loaded data latch-
♦ 48-Pin TQFN Package (7mm x 7mm)
2
es per channel, as well as support for I C speeds up to
Ordering Information
400kHz. The multitable EEPROM memory enables a
rich variety of display system enhancements, including
support for temperature or light-level dependent
gamma tables, enabling of factory or field automated
display adjustment, and support for backlight dimming
algorithms to reduce system power. Upon power-up
and depending on mode, DAC data is selected from
EEPROM by the S0/S1 pins or from a fixed memory
address.
PART
TEMP RANGE
-45°C to +95°C
-45°C to +95°C
PIN-PACKAGE
48 TQFN-EP*
48 TQFN-EP*
DS3514T+
DS3514T+T&R
+Denotes a lead-free/RoHS-compliant package.
T&R = Tape and reel.
*EP = Exposed pad.
Applications
TFT-LCD Gamma and V
Buffer
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Pin Configuration and Typical Operating Circuit appear at
end of data sheet.
Adaptive Gamma and V
2
Adjustment (Real
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Time by I C, Select EEPROM Through I C or
S0/S1 Pins)
Industrial Process Control
Gamma or V
Channel Functional Diagram
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SDA, SCL
2
I C
LATCH A
8-/
10-BIT*
DAC
INTERFACE
A0
MUX
LATCH B
V
OUT
IN
OUT
EEPROM
ADDRESS
S1/ S0
LD
LOGIC
* 10 BITS FOR GAMMA CHANNELS, 8 BITS FOR THE V
CHANNEL.
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________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.