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DS33ZH11 PDF预览

DS33ZH11

更新时间: 2024-11-26 21:55:27
品牌 Logo 应用领域
美信 - MAXIM 网络接口电信集成电路电信电路以太网
页数 文件大小 规格书
169页 1007K
描述
Ethernet Mapper

DS33ZH11 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:10 X 10 MM, 1.41 MM HEIGHT, 0.80 MM PITCH, CSBGA-100针数:100
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
Is Samacsys:NJESD-30 代码:S-PBGA-B100
JESD-609代码:e1长度:10 mm
功能数量:1端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:FBGA
封装形状:SQUARE封装形式:GRID ARRAY, FINE PITCH
峰值回流温度(摄氏度):225认证状态:Not Qualified
标称供电电压:1.8 V表面贴装:YES
电信集成电路类型:SUPPORT CIRCUIT温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

DS33ZH11 数据手册

 浏览型号DS33ZH11的Datasheet PDF文件第2页浏览型号DS33ZH11的Datasheet PDF文件第3页浏览型号DS33ZH11的Datasheet PDF文件第4页浏览型号DS33ZH11的Datasheet PDF文件第5页浏览型号DS33ZH11的Datasheet PDF文件第6页浏览型号DS33ZH11的Datasheet PDF文件第7页 
DS33Z11  
Ethernet Mapper  
www.maxim-ic.com  
GENERAL DESCRIPTION  
FEATURES  
Cꢀ10/100 IEEE 802.3 Ethernet MAC (MII and RMII)  
The DS33Z11 extends a 10/100 Ethernet LAN  
segment by encapsulating MAC frames in HDLC or  
X.86 (LAPS) for transmission over a PDH/TDM data  
stream. The serial link supports bidirectional-  
synchronous interconnect up to 52Mbps over xDSL,  
T1/E1/J1, T3/E3, V.35/Optical, OC-1/EC-1, or  
SONET/SDH Tributary.  
Half/Full Duplex with Automatic Flow Control  
Cꢀ52Mbps Synchronous TDM Serial Port with  
Independent Transmit and Receive Timing  
CꢀHDLC/LAPS Encapsulation with Programmable  
FCS and Interframe Fill  
CꢀCommitted Information Rate Controller Provides  
The device performs store-and-forward of packets  
with full wire-speed transport capability. The built-in  
Committed Information Rate (CIR) controller  
provides fractional bandwidth allocation up to the line  
rate in increments of 512kbps. The DS33Z11 can  
operate with an inexpensive external processor,  
EEPROM or in a stand-alone hardware mode.  
Fractional Allocations in 512kbps Increments  
CꢀProgrammable BERT for Serial (TDM) Interface  
CꢀExternal 16MB, 100MHz SDRAM Buffering  
CꢀParallel Microprocessor Interface  
CꢀSPI Interface and Hardware Mode for Operation  
Without a Host Processor  
CꢀAlso Available in a 100-Ball, 10mm CSBGA—the  
FUNCTIONAL DIAGRAM  
Hardware/SPI Mode-Only DS33ZH11  
Cꢀ1.8V Operation with 3.3V Tolerant I/O  
CꢀIEEE 1149.1 JTAG Support  
DS33Z11  
TRANSCEIVER/  
SERIAL  
SERIAL DRIVER  
PORT  
Feature Highlights continued on page 8.  
CONFIG  
LOADER  
BERT  
APPLICATIONS  
PROM  
OR C  
Transparent LAN Service  
HDLC/X.86  
MAPPER  
LAN Extension  
Ethernet Delivery Over T1/E1/J1, T3/E3, OC-1/EC-1,  
G.SHDSL, or HDSL2/4  
SDRAM  
ORDERING INFORMATION  
10/100  
ETHERNET  
PHY  
10/100  
MAC  
MII/RMII  
PART  
TEMP RANGE  
PIN-PACKAGE  
DS33Z11  
-40°C to +85°C  
169 CSBGA  
DS33ZH11  
-40°C to +85°C  
100 CSBGA  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
1 of 169  
REV: 021805  

DS33ZH11 替代型号

型号 品牌 替代类型 描述 数据表
DS33ZH11+ MAXIM

完全替代

Support Circuit, PBGA100, 10 X 10 MM, 1.41 MM HEIGHT, 0.80 MM PITCH, CSBGA-100

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