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DS32ELX0421 PDF预览

DS32ELX0421

更新时间： 2024-09-28 12:34:43
品牌 Logo 应用领域
德州仪器 - TI 双倍数据速率
页数 文件大小 规格书
32页 2408K
描述
5-bit DDR LVDS Parallel Data Interface

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中文翻译

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DS32ELX0421 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN,针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.63
差分输出：YES驱动器位数：2
输入特性：DIFFERENTIAL接口集成电路类型：LINE DRIVER
接口标准：GENERAL PURPOSEJESD-30 代码：S-XQCC-N48
长度：7 mm功能数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE认证状态：Not Qualified
座面最大高度：0.8 mm最大供电电压：2.625 V
最小供电电压：2.375 V标称供电电压：2.5 V
电源电压1-最大：3.465 V电源电压1-分钟：3.135 V
电源电压1-Nom：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
宽度：7 mmBase Number Matches：1

DS32ELX0421 数据手册

 浏览型号DS32ELX0421的Datasheet PDF文件第2页浏览型号DS32ELX0421的Datasheet PDF文件第3页浏览型号DS32ELX0421的Datasheet PDF文件第4页浏览型号DS32ELX0421的Datasheet PDF文件第5页浏览型号DS32ELX0421的Datasheet PDF文件第6页浏览型号DS32ELX0421的Datasheet PDF文件第7页 
DS32EL0421, DS32ELX0421  
www.ti.com  
SNLS282F –MAY 2008–REVISED APRIL 2013  
DS32EL0421 , DS32ELX0421 125 - 312.5 MHz FPGA-Link Serializer with DDR LVDS  
Parallel Interface  
Check for Samples: DS32EL0421, DS32ELX0421  
1
FEATURES  
DESCRIPTION  
The DS32EL0421/DS32ELX0421 is a 125 MHz to  
312.5 MHz (DDR) serializer for high-speed serial  
transmission over FR-4 printed circuit board  
backplanes, balanced cables, and optical fiber. This  
easy-to-use chipset integrates advanced signal and  
clock conditioning functions, with an FPGA friendly  
interface.  
2
•
5-bit DDR LVDS Parallel Data Interface  
Programmable Transmit De-emphasis  
•
•
•
•
•
Configurable Output Levels (VOD  
)
Selectable DC-balanced Encoder  
Selectable Data Scrambler  
Remote Sense for Automatic Detection and  
Negotiation of Link Status  
The DS32EL0421/DS32ELX0421 serializes up to 5  
parallel input LVDS channels to create a maximum  
data payload of 3.125 Gbps. If the integrated DC-  
balance encoding is enabled, the maximum data  
payload achievable is 2.5 Gbps.  
•
•
•
On Chip LC VCOs  
Redundant Serial Output (ELX device only)  
Data Valid Signaling to Assist with  
Synchronization of Multiple Receivers  
The DS32EL0421/DS32ELX0421 serializers feature  
remote sense capability to automatically detect and  
•
•
•
•
Supports AC- and DC-coupled Signaling  
Integrated CML and LVDS Terminations  
Configurable PLL Loop Bandwidth  
negotiate  
link  
status  
with  
its  
companion  
DS32EL0124/DS32ELX0124 deserializers without  
requiring an additional feedback path.  
Programmable Output Termination (50Ω or  
75Ω).  
The parallel LVDS interface reduces FPGA I/O pins,  
board trace count and alleviates EMI issues, when  
compared to traditional single-ended wide bus  
interfaces.  
•
•
•
•
Built-in Test Pattern Generator  
Loss of Lock and Error Reporting  
Configurable via SMBus  
The DS32EL0421/DS32ELX0421 is programmable  
through a SMBus interface as well as through control  
pins.  
48-pin WQFN Package with Exposed DAP  
TARGET APPLICATIONS  
•
•
•
•
•
•
Imaging: Industrial, Medical Security, Printers  
Displays: LED Walls, Commercial  
Video Transport  
Communication Systems  
Test and Measurement  
Industrial Bus  
KEY SPECIFICATIONS  
•
•
•
•
•
1.25 to 3.125 Gbps Serial Data Rate  
125 to 312.5 MHz DDR Parallel Clock  
-40° to +85°C Temperature Range  
>8 kV ESD (HBM) Protection  
Low Intrinsic Jitter — 35ps at 3.125 Gbps  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2013, Texas Instruments Incorporated  
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