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DS26LV32AW

更新时间： 2024-11-22 22:50:51

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
10页	170K
描述
3V Enhanced CMOS Quad Differential Line Receiver

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数据手册

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DS26LV32AW 数据手册

April 1999

DS26LV32AT

3V Enhanced CMOS Quad Differential Line Receiver

General Description

Features

n Low Power CMOS design (30 mW typical)

The DS26LV32A is a high speed quad differential CMOS re-

ceiver that meets the requirements of both TIA/EIA-422-B

and ITU-T V.11. The CMOS DS26LV32AT features typical

low static I_CCof 9 mA which makes it ideal for battery pow-

ered and power conscious applications. The TRI-STATE^®

enables, EN and EN*, allow the device to be active High or

active Low. The enables are common to all four receivers.

n Interoperable with existing 5V RS-422 networks

n Industrial and Military Temperature Range

n Conforms to TIA/EIA-422-B (RS-422) and ITU-T V.11

Recommendation

n 3.3V Operation

7V Common Mode Range V_ID= 3V

10V Common Mode Range V_ID= 0.2V

The receiver output (RO) is guaranteed to be High when the

inputs are left open. The receiver can detect signals as low

n Receiver OPEN input failsafe feature

n Guaranteed AC Parameter:

Maximum Receiver Skew: 4 ns

Maximum Transition Time: 10 ns

n Pin compatible with DS26C32AT

n 32 MHz Toggle Frequency

as 200 mV over the common mode range of 10V. The re-

ceiver outputs (RO) are compatible with TTL and LVCMOS

levels.

6.5k ESD Tolerance (HBM)

n Available in SOIC and Cerpack Packaging

n Standard Microcircuit Drawing (SMD) 5962-98585

Connection Diagram

Truth Table

Enables

Inputs

RI+–RI−

Output

Dual-In-Line Package

EN*

All Other

V_ID≥ +0.2V

V_ID≤ −0.2V

Combinations of

Enable Inputs

†

Open

†

Open, not terminated

L = Logic Low

H = Logic High

X = Irrelevant

Z = TRI-STATE

DS012908-1

Top View

Order Number DS26LV32ATM or DS26LV32AW

See NS Package Number M16A or W16A

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

DS012908

www.national.com

12 3 4 5 6 7...10

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