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DS26LS33ACN PDF预览

DS26LS33ACN

更新时间： 2024-01-06 19:01:38
品牌 Logo 应用领域
美国国家半导体 - NSC 接口集成电路光电二极管
页数 文件大小 规格书
8页 205K
描述
Quad Differential Line Receivers

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中文翻译

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DS26LS33ACN 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DFP, FL16,.3Reach Compliance Code：unknown
风险等级：5.92JESD-30 代码：R-XDFP-F16
JESD-609代码：e0端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
最大输出低电流：0.008 A封装主体材料：CERAMIC
封装代码：DFP封装等效代码：FL16,.3
封装形状：RECTANGULAR封装形式：FLATPACK
电源：5 V认证状态：Not Qualified
最大接收延迟：25 ns筛选级别：MIL-STD-883 Class B (Modified)
子类别：Line Driver or Receivers标称供电电压：5 V
表面贴装：YES技术：TTL
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：FLAT端子节距：1.27 mm
端子位置：DUALBase Number Matches：1

DS26LS33ACN 数据手册

 浏览型号DS26LS33ACN的Datasheet PDF文件第2页浏览型号DS26LS33ACN的Datasheet PDF文件第3页浏览型号DS26LS33ACN的Datasheet PDF文件第4页浏览型号DS26LS33ACN的Datasheet PDF文件第5页浏览型号DS26LS33ACN的Datasheet PDF文件第6页浏览型号DS26LS33ACN的Datasheet PDF文件第7页 
May 1999  
DS26LS32AC/DS26LS32C/DS26LS32M/DS26LS33M  
Quad Differential Line Receivers  
General Description  
Features  
n High differential or common-mode input voltage ranges  
The DS26LS32 and DS26LS32A are quad differential line re-  
ceivers designed to meet the RS-422, RS-423 and Federal  
Standards 1020 and 1030 for balanced and unbalanced digi-  
tal data transmission.  
±
±
of 7V on the DS26LS32 and DS26LS32A and 15V  
on the DS26LS33  
±
n
0.2V sensitivity over the input voltage range on the  
±
DS26LS32 and DS26LS32A, 0.5V sensitivity on the  
DS26LS33  
The DS26LS32 and DS26LS32A have an input sensitivity of  
±
200 mV over the input voltage range of 7V and the  
n DS26LS32 and DS26LS32A meet all requirements of  
RS-422 and RS-423  
DS26LS33 have an input sensitivity of 500 mV over the input  
±
voltage range of 15V.  
n 6k minimum input impedance  
The DS26LS32A differ in function from the popular  
DS26LS32 and DS26LS33 in that input pull-up and  
pull-down resistors are included which prevent output oscil-  
lation on unused channels.  
n 100 mV input hysteresis on the DS26LS32 and  
DS26LS32A, 200 mV on the DS26LS33  
n Operation from a single 5V supply  
n TRI-STATE outputs, with choice of complementary  
output enables for receiving directly onto a data bus  
Each version provides an enable and disable function com-  
mon to all four receivers and features TRI-STATE outputs  
®
with 8 mA sink capability. Constructed using low power  
Schottky processing, these devices are available over the  
full military and commerical operating temperature ranges.  
Logic Diagram  
DS005255-1  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS005255  
www.national.com  
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中文翻译

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与DS26LS33ACN相关器件

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DS26LS33ACN/A+ NSC

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 		IC,LINE RECEIVER,QUAD,ALS-TTL,DIFFERENTIAL,DIP,16PIN,PLASTIC
DS26LS33ACN/B+ TI

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 		IC,LINE RECEIVER,QUAD,ALS-TTL,DIFFERENTIAL,DIP,16PIN,PLASTIC
DS26LS33C NSC

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 		Quad Differential Line Receivers
DS26LS33CJ NSC

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 		IC QUAD LINE RECEIVER, CDIP16, DIP-16, Line Driver or Receiver
DS26LS33CJ/A+ NSC

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 		IC,LINE RECEIVER,QUAD,ALS-TTL,DIFFERENTIAL,DIP,16PIN,CERAMIC
DS26LS33CM NSC

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 		IC,LINE RECEIVER,QUAD,ALS-TTL,DIFFERENTIAL,SOP,16PIN,PLASTIC
DS26LS33CM TI

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 		IC,LINE RECEIVER,QUAD,ALS-TTL,DIFFERENTIAL,SOP,16PIN,PLASTIC
DS26LS33CN NSC

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 		Quad Differential Line Receivers
DS26LS33CN/A+ NSC

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 		IC,LINE RECEIVER,QUAD,ALS-TTL,DIFFERENTIAL,DIP,16PIN,PLASTIC
DS26LS33CN/B+ NSC

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 		IC,LINE RECEIVER,QUAD,ALS-TTL,DIFFERENTIAL,DIP,16PIN,PLASTIC

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