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DS26LS33ACN PDF预览

DS26LS33ACN

更新时间: 2024-11-26 22:50:51
品牌 Logo 应用领域
美国国家半导体 - NSC 接口集成电路光电二极管
页数 文件大小 规格书
8页 205K
描述
Quad Differential Line Receivers

DS26LS33ACN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.19差分输出:NO
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:EIA-422; EIA-423; FED STD 1020; FED STD 1030JESD-30 代码:R-PDIP-T16
JESD-609代码:e0长度:21.755 mm
功能数量:4端子数量:16
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE最大输出低电流:0.008 A
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified最大接收延迟:35 ns
接收器位数:4座面最大高度:5.08 mm
子类别:Line Driver or Receivers最大压摆率:80 mA
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:NO
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

DS26LS33ACN 数据手册

 浏览型号DS26LS33ACN的Datasheet PDF文件第2页浏览型号DS26LS33ACN的Datasheet PDF文件第3页浏览型号DS26LS33ACN的Datasheet PDF文件第4页浏览型号DS26LS33ACN的Datasheet PDF文件第5页浏览型号DS26LS33ACN的Datasheet PDF文件第6页浏览型号DS26LS33ACN的Datasheet PDF文件第7页 
May 1999  
DS26LS32AC/DS26LS32C/DS26LS32M/DS26LS33M  
Quad Differential Line Receivers  
General Description  
Features  
n High differential or common-mode input voltage ranges  
The DS26LS32 and DS26LS32A are quad differential line re-  
ceivers designed to meet the RS-422, RS-423 and Federal  
Standards 1020 and 1030 for balanced and unbalanced digi-  
tal data transmission.  
±
±
of 7V on the DS26LS32 and DS26LS32A and 15V  
on the DS26LS33  
±
n
0.2V sensitivity over the input voltage range on the  
±
DS26LS32 and DS26LS32A, 0.5V sensitivity on the  
DS26LS33  
The DS26LS32 and DS26LS32A have an input sensitivity of  
±
200 mV over the input voltage range of 7V and the  
n DS26LS32 and DS26LS32A meet all requirements of  
RS-422 and RS-423  
DS26LS33 have an input sensitivity of 500 mV over the input  
±
voltage range of 15V.  
n 6k minimum input impedance  
The DS26LS32A differ in function from the popular  
DS26LS32 and DS26LS33 in that input pull-up and  
pull-down resistors are included which prevent output oscil-  
lation on unused channels.  
n 100 mV input hysteresis on the DS26LS32 and  
DS26LS32A, 200 mV on the DS26LS33  
n Operation from a single 5V supply  
n TRI-STATE outputs, with choice of complementary  
output enables for receiving directly onto a data bus  
Each version provides an enable and disable function com-  
mon to all four receivers and features TRI-STATE outputs  
®
with 8 mA sink capability. Constructed using low power  
Schottky processing, these devices are available over the  
full military and commerical operating temperature ranges.  
Logic Diagram  
DS005255-1  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS005255  
www.national.com  

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