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DS26LS32CN/NOPB PDF预览

DS26LS32CN/NOPB

更新时间: 2024-09-28 21:08:39
品牌 Logo 应用领域
美国国家半导体 - NSC 光电二极管接口集成电路
页数 文件大小 规格书
8页 217K
描述
IC QUAD LINE RECEIVER, PDIP16, PLASTIC, DIP-16, Line Driver or Receiver

DS26LS32CN/NOPB 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:DIP, DIP16,.3Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.03输入特性:DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型:LINE RECEIVER接口标准:EIA-422; EIA-423; FED STD 1020; FED STD 1030
JESD-30 代码:R-PDIP-T16JESD-609代码:e3
长度:19.304 mm湿度敏感等级:1
功能数量:4端子数量:16
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE最大输出低电流:0.008 A
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE电源:5 V
认证状态:Not Qualified最大接收延迟:25 ns
接收器位数:4座面最大高度:5.08 mm
子类别:Line Driver or Receivers最大压摆率:70 mA
标称供电电压:5 V表面贴装:NO
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm
Base Number Matches:1

DS26LS32CN/NOPB 数据手册

 浏览型号DS26LS32CN/NOPB的Datasheet PDF文件第2页浏览型号DS26LS32CN/NOPB的Datasheet PDF文件第3页浏览型号DS26LS32CN/NOPB的Datasheet PDF文件第4页浏览型号DS26LS32CN/NOPB的Datasheet PDF文件第5页浏览型号DS26LS32CN/NOPB的Datasheet PDF文件第6页浏览型号DS26LS32CN/NOPB的Datasheet PDF文件第7页 
May 1999  
DS26LS32AC/DS26LS32C/DS26LS32M/DS26LS33M  
Quad Differential Line Receivers  
General Description  
Features  
n High differential or common-mode input voltage ranges  
of 7V on the DS26LS32 and DS26LS32A and 15V  
on the DS26LS33  
The DS26LS32 and DS26LS32A are quad differential line  
receivers designed to meet the RS-422, RS-423 and Federal  
Standards 1020 and 1030 for balanced and unbalanced  
digital data transmission.  
n
0.2V sensitivity over the input voltage range on the  
DS26LS32 and DS26LS32A, 0.5V sensitivity on the  
DS26LS33  
The DS26LS32 and DS26LS32A have an input sensitivity of  
200 mV over the input voltage range of 7V and the  
DS26LS33 have an input sensitivity of 500 mV over the input  
voltage range of 15V.  
n DS26LS32 and DS26LS32A meet all requirements of  
RS-422 and RS-423  
n 6k minimum input impedance  
The DS26LS32A differ in function from the popular  
DS26LS32 and DS26LS33 in that input pull-up and pull-  
down resistors are included which prevent output oscillation  
on unused channels.  
n 100 mV input hysteresis on the DS26LS32 and  
DS26LS32A, 200 mV on the DS26LS33  
n Operation from a single 5V supply  
n TRI-STATE outputs, with choice of complementary  
output enables for receiving directly onto a data bus  
Each version provides an enable and disable function com-  
mon to all four receivers and features TRI-STATE outputs  
®
with 8 mA sink capability. Constructed using low power  
Schottky processing, these devices are available over the  
full military and commerical operating temperature ranges.  
Logic Diagram  
00525501  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2004 National Semiconductor Corporation  
DS005255  
www.national.com  

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