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DS26F32MW/883 PDF预览

DS26F32MW/883

更新时间： 2024-01-18 16:12:35
品牌 Logo 应用领域
美国国家半导体 - NSC 线路驱动器或接收器驱动程序和接口接口集成电路
页数 文件大小 规格书
6页 211K
描述
Quad Differential Line Receivers

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中文翻译

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DS26F32MW/883 技术参数

生命周期：Active零件包装代码：DFP
包装说明：DFP, FL16,.3针数：16
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.16
其他特性：LG_MAX差分输出：NO
高电平输入电流最大值：0.00005 A输入特性：DIFFERENTIAL
接口集成电路类型：LINE RECEIVER接口标准：EIA-422; EIA-423; FED STD 1020; FED STD 1030
JESD-30 代码：R-CDFP-F16JESD-609代码：e0
长度：10.16 mm湿度敏感等级：1
功能数量：4端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE最大输出低电流：0.008 A
输出极性：TRUE封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DFP封装等效代码：FL16,.3
封装形状：RECTANGULAR封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified最大接收延迟：31 ns
接收器位数：4筛选级别：MIL-STD-883
座面最大高度：2.032 mm子类别：Line Driver or Receivers
最大压摆率：50 mA最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
电源电压1-最大：5.5 V电源电压1-分钟：4.5 V
电源电压1-Nom：5 V表面贴装：YES
技术：BIPOLAR温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.73 mm
Base Number Matches：1

DS26F32MW/883 数据手册

 浏览型号DS26F32MW/883的Datasheet PDF文件第2页浏览型号DS26F32MW/883的Datasheet PDF文件第3页浏览型号DS26F32MW/883的Datasheet PDF文件第4页浏览型号DS26F32MW/883的Datasheet PDF文件第5页浏览型号DS26F32MW/883的Datasheet PDF文件第6页 
May 1999  
DS26F32M  
Quad Differential Line Receivers  
General Description  
Features  
n Military temperature range  
The DS26F32 is a quad differential line receiver designed to  
meet the requirements of EIA Standards RS-422 and  
RS-423, and Federal Standards 1020 and 1030 for balanced  
and unbalanced digital data transmission.  
±
n Input voltage range of 7.0V (differential or common  
±
mode) 0.2V sensitivity over the input voltage range  
n Meets all the requirements of EIA standards RS-422 and  
RS-423  
n High input impedance (18k typical)  
n 30 mV input hysteresis  
n Operation from single +5.0V supply  
n Input pull-down resistor prevents output oscillation on  
unused channels  
The DS26F32 offers improved performance due to the use  
of state-of-the-art L-FAST bipolar technology. The L-FAST  
technology allows for higher speeds and lower currents by  
utilizing extremely short gate delay times. Thus, the  
DS26F32 features lower power, extended temperature  
range, and improved specifications.  
The device features an input sensitivity of 200 mV over the  
n TRI-STATE outputs, with choice of complementary  
enables, for receiving directly onto a data bus  
n Propagation delay 15 ns typical  
±
input common mode range of 7.0V. The DS26F32 provides  
an enable function common to all four receivers and  
®
TRI-STATE  
outputs with 8.0 mA sink capability. Also, a  
fail-safe input/output relationship keeps the outputs high  
when the inputs are open.  
The DS26F32 offers optimum performance when used with  
the DS26F31 Quad Differential Line Driver.  
Connection Diagrams  
20-Lead Ceramic Leadless Chip Carrier  
16-Lead DIP  
DS009615-7  
Function Table  
(Each Receiver)  
Differential Inputs  
Enables  
Outputs  
=
VID (V IN+) − (VIN−)  
E
E
X
L
OUT  
H
VID ≥ 0.2V  
VID ≤ −0.2V  
X
H
X
H
X
L
H
DS009615-1  
X
L
L
Top View  
See NS Package Number J16A  
L
For Complete Military Product Specifications,  
refer to the appropriate SMD or MDS.  
Order Number DS26F32ME/883,  
DS26F32MJ/883 or DS26F32MW/883  
See NS Package Number E20A, J16A or W16A  
H
Z
=
=
H
L
X
High Level  
Low Level  
=
Immaterial  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS009615  
www.national.com  
123456

中文翻译

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