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DS25BR150TSDX/NOPB PDF预览

DS25BR150TSDX/NOPB

更新时间: 2024-11-09 12:58:15
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
12页 397K
描述
IC LINE DRIVER, DSO8, 3 X 3 MM, GREEN, LLP-8, Line Driver or Receiver

DS25BR150TSDX/NOPB 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:HVSON, SOLCC8,.11,20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.42差分输出:YES
驱动器位数:1输入特性:DIFFERENTIAL
接口集成电路类型:LINE DRIVER接口标准:GENERAL PURPOSE
JESD-30 代码:S-XDSO-N8JESD-609代码:e3
长度:3 mm湿度敏感等级:1
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVSON
封装等效代码:SOLCC8,.11,20封装形状:SQUARE
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大接收延迟:座面最大高度:0.8 mm
子类别:Line Driver or Receivers最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40最大传输延迟:0.465 ns
宽度:3 mmBase Number Matches:1

DS25BR150TSDX/NOPB 数据手册

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November 6, 2007  
DS25BR150  
3.125 Gbps LVDS Buffer  
General Description  
The DS25BR150 is a single channel 3.125 Gbps LVDS buffer  
optimized for high-speed signal transmission over printed cir-  
cuit boards and balanced cables. Fully differential signal  
paths ensure exceptional signal integrity and noise immunity.  
The DS25BR150 is a buffer/repeater with very low power  
consumption. Other LVDS devices with similar IO character-  
istics and with signal conditioning features include the follow-  
ing products. The DS25BR110 features four levels of  
equalization for use as an optimized receiver device, the  
DS25BR120 features four levels of pre-emphasis for use as  
an optimized driver device, while the DS25BR100 features  
both pre-emphasis and equalization for use as an optimized  
repeater device.  
Features  
DC - 3.125 Gbps low jitter, high noise immunity, low power  
operation  
On-chip 100 input and output termination minimizes  
insertion and return losses, reduces component count and  
minimizes board space  
7 kV ESD on LVDS I/O pins protects adjoining  
components  
Small 3 mm x 3 mm LLP-8 space saving package  
Applications  
Clock or data buffering / repeating  
OC-48 / STM-16 Clock or data buffering / repeating  
Wide input common mode range allows the receiver to accept  
signals with LVDS, CML and LVPECL levels; the output levels  
are LVDS. A very small package footprint requires a minimal  
space on the board while the flow-through pinout allows easy  
board layout. The differential inputs and outputs are internally  
terminated with a 100resistor to lower device input and out-  
put return losses, reduce component count, and further min-  
imize board space.  
InfiniBand  
FireWire  
Typical Application  
30005510  
© 2007 National Semiconductor Corporation  
300055  
www.national.com  

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