Datasheet > DS25BR110

DS25BR110

更新时间： 2024-09-17 11:12:15

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德州仪器 - TI		/
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描述
具有接收均衡功能的 3.125Gbps LVDS 缓冲器

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DS25BR110 数据手册

DS25BR110

www.ti.com

SNLS255E –MARCH 2007–REVISED APRIL 2013

DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization

Check for Samples: DS25BR110

FEATURES

DESCRIPTION

The DS25BR110 is a single channel 3.125 Gbps

LVDS buffer optimized for high-speed signal

transmission over lossy FR-4 printed circuit board

backplanes and balanced metallic cables. A fully

differential signal path ensures exceptional signal

integrity and noise immunity.

•

DC - 3.125 Gbps Low Jitter, High Noise

Immunity, Low Power Operation

Four Levels of Receive Equalization Reduce

ISI Jitter

On-Chip 100Ω Input and Output Termination

Minimizes Insertion and Return Losses,

Reduces Component Count, and Minimizes

Board Space

The DS25BR110 features four levels of receive

equalization (EQ), making it ideal for use as a

receiver device. Other LVDS devices with similar IO

characteristics include the following products. The

DS25BR120 features four levels of pre-emphasis for

use as an optimized driver device, while the

DS25BR100 features both pre-emphasis and

equalization for use as an optimized repeater device.

The DS25BR150 is a buffer/repeater with the lowest

power consumption and does not feature transmit

pre-emphasis nor receive equalization.

•

7 kV ESD on LVDS I/O Pins Protects Adjoining

Components

Small 3 mm x 3 mm 8-WSON Space Saving

Package

APPLICATIONS

•

Clock and Data Buffering

Metallic Cable Equalization

FR-4 Equalization

Wide input common mode range allows the receiver

to accept signals with LVDS, CML and LVPECL

levels; the output levels are LVDS. A very small

package footprint requires minimal space on the

board while the flow-through pinout allows easy board

layout. The differential inputs and outputs are

internally terminated with a 100Ω resistor to lower

device input and output return losses, reduce

component count, and further minimize board space.

Typical Application

CML

LVDS

ASIC / FPGA

LVPECL

ASIC / FPGA

LVDS

BR110

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...21

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DS25BR110 替代型号

型号	品牌	替代类型	描述	数据表
DS25BR100	TI	功能相似	具有发送预加重和接收均衡功能的 3.125Gbps LVDS 缓冲器
DS25BR120	TI	功能相似	DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

与DS25BR110相关器件

型号	品牌	获取价格	描述	数据表
DS25BR110_0711	NSC	获取价格	3.125 Gbps LVDS Buffer with Receive Equalization
DS25BR110TSD	NSC	获取价格	3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization
DS25BR110TSD/NOPB	NSC	获取价格	IC LINE DRIVER, DSO8, 3 X 3 MM, GREEN, LLP-8, Line Driver or Receiver
DS25BR110TSD/NOPB	TI	获取价格	具有接收均衡功能的 3.125Gbps LVDS 缓冲器 \| NGQ \| 8 \| -40
DS25BR110TSDX/NOPB	TI	获取价格	具有接收均衡功能的 3.125Gbps LVDS 缓冲器 \| NGQ \| 8 \| -40
DS25BR120	NSC	获取价格	3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis
DS25BR120	TI	获取价格	DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis
DS25BR120_0711	NSC	获取价格	3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis
DS25BR120TSD	NSC	获取价格	3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization
DS25BR120TSD/NOPB	TI	获取价格	DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

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