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DS2153QN PDF预览

DS2153QN

更新时间: 2024-11-13 23:48:51
品牌 Logo 应用领域
其他 - ETC 电信集成电路PC
页数 文件大小 规格书
87页 1103K
描述
PCM Transceiver

DS2153QN 数据手册

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DS2154  
Enhanced E1 Single Chip Transceiver  
www.dalsemi.com  
FEATURES  
PACKAGE OUTLINE  
Complete E1(CEPT) PCM-30/ISDN-PRI  
transceiver functionality  
Onboard long- and short-haul line interface for  
clock/data recovery and waveshaping  
32-bit or 128-bit crystal-less jitter attenuator  
Generates line build outs for both 120=and  
75=lines  
Frames to FAS, CAS, and CRC4 formats  
Dual onboard two-frame elastic store slip buffers  
that can connect to asynchronous backplanes up to  
8.192 MHz  
8-bit parallel control port that can be used directly  
on either multiplexed or non-multiplexed buses  
Extracts and inserts CAS signaling  
Detects and generates Remote and AIS alarms  
Programmable output clocks for Fractional E1,  
H0, and H12 applications  
Fully independent transmit and receive  
functionality  
Full access to both Si and Sa bits aligned with  
CRC multiframe  
Four separate loopbacks for testing functions  
Large counters for bipolar and code violations,  
CRC4 codeword errors, FAS errors, and E bits  
Pin compatible with DS2152 T1 Enhanced Single-  
Chip Transceiver  
1
ORDERING INFORMATION  
DS2154L  
DS2154LN  
(0°C to 70°C)  
(-40°C to +85°C)  
5V supply; low power CMOS  
100-pin 14mm2 body LQFP package  
DESCRIPTION  
The DS2154 Enhanced Single-Chip Transceiver (ESCT) contains all of the necessary functions for  
connection to E1 lines. The device is an upward compatible version of the DS2153 Single-Chip  
Transceiver. The onboard clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to a NRZ  
serial stream. The DS2154 automatically adjusts to E1 22AWG (0.6 mm) twisted-pair cables from 0 to  
over 2 km in length. The device can generate the necessary G.703 waveshapes for both 75-ohm coax and  
120-ohm twisted cables. The onboard jitter attenuator (selectable to either 32 bits or 128 bits) can be  
placed in either the transmit or receive data paths. The framer locates the frame and multiframe  
boundaries and monitors the data stream for alarms. It is also used for extracting and inserting signaling  
data, Si, and Sa bit information. The device contains a set of internal registers which the user can access  
to control the operation of the unit. Quick access via the parallel control port allows a single controller to  
handle many E1 lines. The device fully meets all of the latest E1 specifications including ITU G.703,  
G.704, G.706, G.823, G.932, and I.431 as well as ETS 300 011, 300 233, 300 166, TBR 12 and TBR 13.  
1 of 87  
112099  

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