DS1644LPM
DS1644LPM
Nonvolatile Timekeeping RAM
FEATURES
PIN ASSIGNMENT
• Upward compatible with the DS1643AL Timekeeping
NC
NC
NC
1
2
3
4
5
6
7
8
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
NC
NC
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
RAM to achieve higher RAM density
• Integrated NV SRAM, real time clock, crystal, power–
fail control circuit and lithium energy source
PFO
V
CC
WE
OE
CE
• Low profile socketable module
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
9
–
255 mil package height
10
11
12
13
14
15
16
17
• Clock registers are accessed identical to the static
RAM. These registers are resident in the eight top
RAM locations.
A4
A3
A2
A1
• Totally nonvolatile with over 10 years of operation in
the absence of power
A0
34–PIN LOW PROFILE MODULE
• Access time of 120 ns and 150 ns
• Quartz accuracy ±1 minute a month @ 25°C, factory
PIN DESCRIPTION
calibrated
A0–A14
CE
–
–
–
–
–
–
–
–
–
Address Input
Chip Enable
Output Enable
Write Enable
+5 Volts
• BCD coded year, month, date, day, hours, minutes,
and seconds with leap year compensation valid up to
2100
OE
WE
V
GND
CC
Ground
• Power–fail write protection allows for ±10% V pow-
CC
DQ0-DQ7
NC
PFO
Data Input/Output
No Connection
Power Fail Output
er supply tolerance
ORDERING INFORMATION
DS1644L–XXX Low Profile Module
–120 120 ns access
–150 150 ns access
DESCRIPTION
The DS1644L is a low profile module that requires a
PLCC surface mountable socket and is functionally
equivalent to the DS1644. The DS1644L is a 32K x 8
nonvolatilestatic RAM with a full function real time clock
which are both accessible in a Byte–wide format. The
real time clock information resides in the eight upper-
most RAM locations. The RTC registers contain year,
month, date, day, hours, minutes, and seconds data in
24 hour BCD format. Corrections for the day of the
month and leap year are made automatically. The RTC
clockregistersaredoublebufferedtoavoidaccessofin-
correct data that can occur during clock update cycles.
The double buffered system also prevents time loss as
the timekeeping countdown continues unabated by ac-
cess to time register data. The DS1644L also contains
its own power–fail circuitry which deselects the device
when the V
supply is in an out–of–tolerance condi-
CC
tion. This feature prevents loss of data from unpredict-
able system operation brought on by low V as errant
CC
access and update cycles are avoided.
ECopyright 1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
041697 1/11