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DS14C89ATJ

更新时间： 2024-11-05 23:16:31

品牌	Logo	应用领域
美国国家半导体 - NSC		接口集成电路
页数	文件大小	规格书
6页	119K
描述
Quad CMOS Receiver

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DS14C89ATJ 数据手册

February 1996

DS14C89A/DS14C89AT

Quad CMOS Receiver

General Description

Features

Meets EIA/TIA-232-E and CCITT V.28 Standards

Industrial Temperature Range

The DS14C89A/DS14C89AT, pin-for-pin compatible to the

DS1489A/MC1489A, are receivers designed to interface

data terminal equipment (DTE) with data circuit-terminating

equipment (DCE). These devices translate levels conform-

ing to EIA-232E and CCITT V.28 standards to TTL/CMOS

logic levels.

40 C to 85 C–DS14C89AT

LOW Power consumption

On chip noise filter

Available in SOIC Package

The device is fabricated in low threshold CMOS metal gate

technology. The device provides very low power consump-

tion compared to their bipolar equivalents: 900 mA

(DS14C89A) versus 26 mA (DS1489A).

The DS14C89A/DS14C89AT provide on chip noise filtering

which eliminates the need for external response control fil-

ter capacitors. When replacing the DS1489A with the

DS14C89A/DS14C89AT, the response control filter pins

can be tied high, low, or not connected.

Connection Diagram

TL/F/11106–1

Order Number DS14C89AN, DS14C89AM,

DS14C89ATJ, DS14C89ATN, DS14C89ATM

See NS Package Number J14A, M14A, N14A

1996 National Semiconductor Corporation

TL/F/11106

RRD-B30M36/Printed in U. S. A.

http://www.national.com

12 3 4 5 6

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