Datasheet > DS1100LM-75

DS1100LM-75

更新时间： 2022-12-01 20:46:20

品牌	Logo	应用领域
达拉斯 - DALLAS		光电二极管
页数	文件大小	规格书
6页	57K
描述
Silicon Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDIP8, 0.300 INCH, DIP-8

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DS1100LM-75 数据手册

Preliminary

DS1100L

3-Volt 5-Tap Economy Timing

Element (Delay Line)

www.dalsemi.com

FEATURES

PIN ASSIGNMENT

ꢀ All-silicon timing circuit

ꢀ 5-taps equally spaced

TAP 2

TAP 4

GND

V_CC

ꢀ Delays are stable and precise

ꢀ Both leading and trailing edge accuracy

ꢀ 3V version of the DS1100

ꢀ Low-power CMOS

ꢀ TTL/CMOS-compatible

ꢀ Vapor phase, IR and wave solderable

ꢀ Custom delays available

ꢀ Fast turn prototypes

TAP 1

TAP 3

TAP 5

DS1100M 8-PIN DIP (300 MIL)

DS1100Z 8-PIN SOIC (150 MIL)

DS1100U 8-PIN MICRO-SOP

ꢀ Delays specified over both commercial and

industrial temperature ranges

PIN DESCRIPTION

TAP 1-TAP 5

- TAP Output Number

- +5V

- Ground

V_CC

GND

- Input

DESCRIPTION

The DS1100L is a 3-volt version of the DS1100. It is characterized for operation over the range 2.7V to

3.6V.

The DS1100L series delay lines have five equally spaced taps providing delays from 4 ns to 300 ns.

These devices are offered in 8-pin DIPs and surface mount packages to save PC board area. Low cost and

superior reliability over hybrid technology is achieved by the combination of a 100% silicon delay line

and industry standard DIP and SOIC packaging. The DS1100L 5-Tap Silicon Delay Line reproduces the

input logic state at the output after a fixed delay as specified by the extension of the part number after the

dash. The DS1100L is designed to reproduce both leading and trailing edges with equal precision. Each

tap is capable of driving up to ten 74LS loads.

Dallas Semiconductor can customize standard products to meet special needs. For special requests and

rapid delivery, call (972) 371-4348.

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