DS1045
4-Bit Dual Programmable Delay Line
www.dalsemi.com
FEATURES
PIN ASSIGNMENT
ꢀ All-silicon time delay
IN
1
2
3
4
5
6
7
8
16 VCC
ꢀ Two programmable outputs from a single
input produce output-to-output delays
between 9 and 84 ns depending on device
type
ꢀ Programmable via four input pins
ꢀ Programmable increments of 3 to 5 ns with a
minimum of 9 ns and a maximum of 84 ns
ꢀ Output pulse is a reproduction of input pulse
after
ꢀ Delay with both leading and trailing edge
accuracy
ꢀ Standard 16-pin DIP or surface mount 16-pin
SOIC
VCC
EB
15
14
OUTB
EA
A0
VCC
15 EB
14 OUTB
13 B0
IN
VCC
EA
A0
A1
A2
A3
16
1
2
3
4
5
6
13 B0
12 B1
A1
A2
11
10
9
B2
B1
B2
B3
OUTA
12
11
10
9
A3
B3
7
8
GND
OUTA
GND
DS1045 16-Pin DIP
See Mech. Drawings
Section
DS1045S 16-Pin SOIC (300-mil)
See Mech. Drawings
Section
PIN DESCRIPTION
IN
- Delay Line Input
OUTA, OUTB
A0-A3
- Delay Line Outputs
- Parallel Program Inputs
for OUT1
ꢀ Auto-insertable
ꢀ Low-power CMOS design is TTL-compatible
B0-B3
- Parallel Program Inputs
for OUT2
EA , EB
VCC
- Enable A and B Inputs
- +5V Input
GND
- Ground
DESCRIPTION
The DS1045 is a programmable silicon delay line having one input and two 4-bit programmable delay
outputs. Each 4-bit programmable output offers the user 16 possible delay values to select from, starting
with a minimum inherent DS1045 delay of 9 ns and a maximum achievable delay in the standard DS1045
family of 84 ns. The standard DS1045 product line provides the user with three devices having uniform
delay increments of 3, 4, and 5 ns, depending on the device. Table 1 presents standard device family and
delay capability. Additionally, custom delay increments are available for special order through Dallas
Semiconductor.
The DS1045 is TTL and CMOS-compatible and capable of driving ten 74LS-type loads. The output
produced by the DS1045 is both rising and falling edge precise. The DS1045 programmable silicon
delay line has been designed as a reliable, economic alternative to hybrid programmable delay lines. It is
offered in a standard 16-pin auto-insertable DIP and a space-saving surface mount 16-pin SOIC package.
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