Datasheet > DS1023S-500+T

DS1023S-500+T

更新时间： 2024-09-19 05:22:07

品牌	Logo	应用领域
美信 - MAXIM		光电二极管
页数	文件大小	规格书
16页	251K
描述
Delay Line, Programmable, 1-Func, 1-Tap, CMOS, PDSO16

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DS1023S-500+T 数据手册

DS1023

8-Bit Programmable Timing Element

www.maxim-ic.com

FEATURES

PIN ASSIGNMENT

CꢀStep sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns

CꢀOn-chip reference delay

V_CC

CꢀConfigurable as delay line, pulse width

OUT/OUT

P/S

modulator, or free-running oscillator

Q/P0

CLK/P1

D/P2

CꢀCan delay clocks by a full period or more

CꢀGuaranteed monotonicity

CꢀParallel or serial programming

CꢀSingle 5V supply

REF/PWM

GND

Cꢀ16-pin DIP or SOIC package

DS1023 300-mil DIP

DS1023S 300-mil SOIC

PIN DESCRIPTION

- Input

P0/Q

- Parallel Input P0 (parallel mode)

- Serial Data Output (serial mode)

- Parallel Input P1 (parallel mode)

- Serial Input Clock (serial mode)

- Parallel Input P2 (parallel mode)

- Serial Data Input (serial mode)

- Remaining Parallel Inputs

- Ground

P1/CLK

P2/D

P3 - P7

GND

OUT/OUT

- Output

REF/PWM - Reference or PWM Output

P /S

- Parallel / Serial Programming

Select

- Output Mode Select

- Input Latch Enable

- Supply Voltage

V_CC

DESCRIPTION

The DS1023 is an 8-bit programmable delay line similar in function to the DS1020/DS1021.

Additional features have been added to extend the range of applications:

The internal delay line architecture has been revised to allow clock signals to be delayed by up to a full

period or more. Combined with an on-chip reference delay (to offset the inherent or “step zero” delay of

the device) clock phase can now be varied over the full 0-360 degree range.

1 of 16

070505

12 3 4 5 6 7...16

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