DRV8353M
SLVSFOD2 –RJVU8L3Y52302M0
SLVSFO2 – JULY 2020
www.ti.com
DRV8353M 100-V Three-Phase Smart Gate Driver
1 Features
3 Description
•
9 to 100-V, Triple half-bridge gate driver
The DRV8353M family of devices are highly-
integrated gate drivers for three-phase brushless DC
(BLDC) motor applications. These applications
include field-oriented control (FOC), sinusoidal current
control, and trapezoidal current control of BLDC
motors. The device variants provide optional
integrated current shunt amplifiers to support different
motor control schemes and a buck regulator to power
the gate driver or external controller.
– Extended TA operation -55 °C to 125 °C
– Optional triple low-side current shunt amplifiers
Smart gate drive architecture
– Adjustable slew rate control for EMI
performance
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– VGS handshake and minimum dead-time
insertion to prevent shoot-through
– 50-mA to 1-A peak source current
– 100-mA to 2-A peak sink current
– dV/dt mitigation through strong pulldown
Integrated gate driver power supplies
– High-side doubler charge pump For 100%
PWM duty cycle control
The DRV8353M uses smart gate drive (SGD)
architecture to decrease the number of external
components that are typically necessary for MOSFET
slew rate control and protection circuits. The SGD
architecture also optimizes dead time to prevent
shoot-through conditions, provides flexibility in
decreasing electromagnetic interference (EMI) by
MOSFET slew rate control, and protects against gate
short circuit conditions through VGS monitors. A strong
gate pulldown circuit helps prevent unwanted dV/dt
parasitic gate turn on events
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– Low-side linear regulator
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Integrated triple current shunt amplifiers
– Adjustable gain (5, 10, 20, 40 V/V)
– Bidirectional or unidirectional support
6x, 3x, 1x, and independent PWM modes
– Supports 120° sensored operation
SPI or hardware interface available
Low-power sleep mode (20 µA at VVM = 48-V)
Integrated protection features
– VM undervoltage lockout (UVLO)
– Gate drive supply undervoltage (GDUV)
– MOSFET VDS overcurrent protection (OCP)
– MOSFET shoot-through prevention
– Gate driver fault (GDF)
Various PWM control modes (6x, 3x, 1x, and
independent) are supported for simple interfacing to
the external controller. These modes can decrease
the number of outputs required of the controller for the
motor driver PWM control signals. This family of
devices also includes 1x PWM mode for simple
sensored trapezoidal control of a BLDC motor by
using an internal block commutation table.
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Table 3-1. Device Information
PART NUMBER
PACKAGE
BODY SIZE (NOM)
– Thermal warning and shutdown (OTW/OTSD)
– Fault condition indicator (nFAULT)
DRV8353M
WQFN (40)
6.00 mm x 6.00 mm
1. For all available packages, see the orderable
addendum at the end of the data sheet.
2 Applications
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3-phase brushless-DC (BLDC) motor modules
Fans, blowers, and pumps
9 to 75 V
7 to 100 V
Drain
Sense
DRV8353M
PWM
Three-Phase
Smart Gate Driver
SPI or H/W
M
Gate Drive
nFAULT
Protection
Current
Sense
Current Sense
3x Shunt Amplifiers
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Copyright © 2020 Texas Instruments Incorporated
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