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DP83952CVUL PDF预览

DP83952CVUL

更新时间： 2024-02-06 09:39:33
品牌 Logo 应用领域
德州仪器 - TI 局域网
页数 文件大小 规格书
90页 715K
描述
IC,LAN HUB CONTROLLER,CMOS,QFP,160PIN

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DP83952CVUL 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QFP, QFP160,1.2SQReach Compliance Code：unknown
风险等级：5.9JESD-30 代码：S-PQFP-G160
JESD-609代码：e0端子数量：160
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP160,1.2SQ封装形状：SQUARE
封装形式：FLATPACK电源：5 V
认证状态：Not Qualified子类别：Network Interfaces
最大压摆率：0.38 mA标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.635 mm
端子位置：QUADBase Number Matches：1

DP83952CVUL 数据手册

 浏览型号DP83952CVUL的Datasheet PDF文件第2页浏览型号DP83952CVUL的Datasheet PDF文件第3页浏览型号DP83952CVUL的Datasheet PDF文件第4页浏览型号DP83952CVUL的Datasheet PDF文件第5页浏览型号DP83952CVUL的Datasheet PDF文件第6页浏览型号DP83952CVUL的Datasheet PDF文件第7页 
PRELIMINARY  
September 1995  
DP83952  
Repeater Interface Controller with  
Security Features (RICTM II)  
Y
Separate Partition state machines for each port  
General Description  
Y
Y
Compatible with 802.3k Hub Management requirements  
Provides port status information for LED displays in-  
cluding: receive, collision, partition, link status, and jab-  
ber  
The DP83952 RIC II Repeater Interface Controller is an  
‘‘Enhanced’’ version of the DP83950 RIC. RIC II is fully  
backward pin and functional compatible with the RIC. The  
DP83952 RIC II has the same basic architecture as the RIC  
with additional feature enhancements. RIC II provides addi-  
tional network security options, additional statistics for re-  
peater activities, and a faster processor interface. When  
RIC II is used in a ‘‘non-secure’’ mode, it functions in the  
same manner as the DP83950 RIC. When RIC II is used in a  
‘‘secure’’ mode, it restricts unauthorized nodes from intrud-  
ing and/or eavesdropping into the network. The RIC II uti-  
lizes internal CAMs to store/compare addresses of valid  
nodes when network security is desired.  
Y
Y
Power-up configuration options:  
Repeater and Partition Specifications, Transceiver Inter-  
face, Status Display, Processor Operations  
Simple processor interface for repeater management  
and port disable  
Y
Y
On-chip Event Counters and Event Flag Arrays  
Serial Management Bus Interface to combine packet  
and repeater status information  
Y
Y
CMOS process for low power dissipation  
Single 5V supply  
RIC II implements the IEEE 802.3 multiport repeater unit  
specifications. It is fully compliant with the 802.3 repeater  
specification for the repeater, segment partition, and jabber  
lockup protection state machines. (Continued)  
Security Features  
Y
Power-up configuration options  
Y
Prevents unauthorized eavesdropping and/or intrusion  
on a per port basis  
Features  
Y
Compliant with the IEEE 802.3 Repeater Specification  
Y
58 on-chip CAMs (Content Addressable Memory) allow  
storage of acceptable addresses  
Y
13 network connections (ports) per chip  
Y
Y
Selectable on-chip twisted-pair transceivers  
Learn mode automatically records addresses of at-  
tached nodes  
Y
Cascadable for large hub applications  
Y
Compatible with AUI compliant transceivers  
Y
On-chip Elasticity Buffer, Manchester encoder and  
decoder  
1.0 System Diagram  
TL/F/12499–1  
TRI-STATE is a registered trademark of National Semiconductor Corporation.  
RICTM, Inter-RICTM and SONICTM are trademarks of National Semiconductor Corporation.  
PALÉ is a registered trademark of and used under license from Advanced Micro Devices, Inc.  
GALÉ is a registered trademark of Lattice Semiconductor.  
C
1995 National Semiconductor Corporation  
TL/F/12499  
RRD-B30M115/Printed in U. S. A.  
1234567...90

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