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DP83907

更新时间： 2024-01-04 09:29:16
品牌 Logo 应用领域
美国国家半导体 - NSC 局域网
页数 文件大小 规格书
70页 888K
描述
AT/LANTIC⑩ II

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中文翻译

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DP83907 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：BQFP, SPQFP132,1.1SQReach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：5.74
地址总线宽度：20边界扫描：NO
总线兼容性：ISA最大时钟频率：20 MHz
数据编码/解码方法：NRZ; BIPH-LEVEL(MANCHESTER)最大数据传输速率：1.25 MBps
外部数据总线宽度：16JESD-30 代码：S-PQFP-G132
JESD-609代码：e3长度：24.13 mm
低功率模式：NO湿度敏感等级：2
DMA 通道数量：2I/O 线路数量：
串行 I/O 数：2端子数量：132
片上数据RAM宽度：最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：BQFP封装等效代码：SPQFP132,1.1SQ
封装形状：SQUARE封装形式：FLATPACK, BUMPER
峰值回流温度（摄氏度）：260电源：5 V
认证状态：Not QualifiedRAM（字数）：0
座面最大高度：4.45 mm子类别：Serial IO/Communication Controllers
最大压摆率：150 mA最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：TIN
端子形式：GULL WING端子节距：0.64 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：24.13 mmuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：1

DP83907 数据手册

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PRELIMINARY  
November 1995  
DP83907 AT/LANTICTMII  
General Description  
The DP83907 Twisted-Pair Enhanced Coaxial Network In-  
terface Controller is a CMOS VLSI device designed for easy  
implementation of CSMA/CD local area networks.  
Features  
Y
Controller and integrated bus interface solution for IEEE  
802.3, 10BASE5, 10BASE2, and 10BASE-T  
Y
Software compatible with industry standard Ethernet  
Adapters: Novell ’s NE2000  
É
Unique to the DP83907 is the integration of the entire bus  
interface for PCAT ISA (Industry Standard Architecture) bus  
based systems. Hardware and software selectable options  
allow the DP83907’s bus interface to be configured in the  
same manner as an NE2000 Architecture. All bus drivers  
and control logic are integrated to reduce board cost and  
area.  
Y
Y
Y
No external bus logic or drivers needed  
Supports jumpered or jumperless configuration  
Provides EEPROM interface for non-volatile storage of  
configuration data, user-defined data and Ethernet  
Physical Address  
Y
Y
Y
Y
Allows in-situ programming of EEPROM  
Integrated controller, ENDEC, and transceiver  
Full IEEE 802.3 compliant AUI interface  
Single 5V supply  
Supported network interfaces include 10BASE5 or  
10BASE2 Ethernet via an external transceiver connected to  
its AUl port, and Twisted-pair Ethernet (10BASE-T) using  
É
the on-board transceiver. The DP83907 provides the Ether-  
net Media Access Control (MAC), Encode-Decode (ENDEC)  
with an AUl interface, and 10BASE-T transceiver functions  
in accordance with the lEEE 802.3 standards.  
10BASE-T TRANSCEIVER MODULE:  
Y
Integrates transceiver functionality  
Y
Transmitter and receiver functions  
Y
Collision detect, heartbeat and jabber  
The DP83907’s integrated 10BASE-T transceiver fully com-  
plies with the IEEE standard. This functional block incorpo-  
rates the receiver, transmitter, collision, heartbeat, loop-  
back, jabber, and link integrity blocks as defined in the stan-  
dard. The transceiver when combined with equalization re-  
sistors, transmit/receive filters, and pulse transformers pro-  
vides a complete physical interface from the DP83907’s  
Y
Selectable link integrity test or link disable  
Y
Polarity Detection/Correction  
Y
Auto switch  
Y
On chip filter  
ENDEC MODULE:  
Y
10 Mbit/s Manchester encoding/decoding  
ENDEC module and the twisted pair medium.  
(continued)  
Y
Squelch on receive and collision pairs  
MAC/CONTROLLER MODULE:  
Y
Software compatible with DP8390, DP83901, DP83902  
Y
Efficient buffer management implementation  
IN-CIRCUIT TEST  
1.0 System Diagram  
TL/F/12082–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
AT/LANTICTM is a trademark of National Semiconductor Corporation.  
EthernetÉ is a registered trademark of Xerox Corporation.  
NetWareTM is a trademark of Novell Incorporated.  
NovellÉ is a registered trademark of Novell Incorporated.  
C
1995 National Semiconductor Corporation  
TL/F/12082  
RRD-B30M115/Printed in U. S. A.  
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