Datasheet > DP8051

DP8051

更新时间： 2024-01-31 09:05:44

品牌	Logo	应用领域
DCD		微控制器
页数	文件大小	规格书
9页	133K
描述
Pipelined High Performance 8-bit Microcontroller ver 3.10

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技术参数
数据手册

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DP8051 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	compliant	风险等级：	5.92
Is Samacsys：	N	Base Number Matches：	1

DP8051 数据手册

DP8051

Pipelined High Performance

8-bit Microcontroller

ver 3.10

O V E R V I E W

C P U F E A T U R E S

DP8051 is an ultra high performance,

speed optimized soft core of a single-chip 8-

bit embedded controller dedicated for opera-

tion with fast (typically on-chip) and slow (off-

chip) memories. The core has been designed

with a special concern about performance to

power consumption ratio. This ratio is ex-

tended by an advanced power management

unit PMU.

● 100% software compatible with industry

standard 8051

● Pipelined RISC architecture enables to

execute instructions 10 times faster com-

pared to standard 8051

● 24 times faster multiplication

● 12 times faster addition

● Up to 256 bytes of internal (on-chip) Data

DP8051 soft core is 100% binary-

compatible with the industry standard 8051 8-

bit microcontroller. There are two configura-

tions of DP8051: Harward where internal data

and program buses are separated, and von

Neumann with common program and external

data bus. DP8051 has Pipelined RISC archi-

tecture 10 times faster compared to standard

architecture and executes 85-200 million in-

structions per second. This performance can

also be exploited to great advantage in low

power applications where the core can be

clocked over ten times more slowly than the

original implementation for no performance

penalty.

Memory

● Up to 64K bytes of internal (on-chip) or

external (off-chip) Program Memory

● Up to 16M bytes of external (off-chip) Data

Memory

● User programmable Program Memory Wait

States solution for wide range of memories

speed

● User programmable External Data Memory

Wait States solution for wide range of

memories speed

● De-multiplexed Address/Data bus to allow

DP8051 is delivered with fully automated

testbench and complete set of tests allowing

easy package validation at each stage of SoC

design flow.

easy connection to memory

● Dedicated signal for Program Memory

writes.

● Interface for additional Special Function

Registers

All trademarks mentioned in this document

are trademarks of their respective owners.

http://www.DigitalCoreDesign.com

http://www.dcd.pl

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