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DP7251

更新时间: 2024-10-01 01:25:47
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尼得科 - NIDEC /
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15页 168K
描述
Quad Digital Potentiometer

DP7251 数据手册

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DP7251  
Quad Digital Potentiometer (DP) with  
256 Taps and SPI Interface  
FEATURES  
DESCRIPTION  
Four linear-taper digital potentiometers  
254 resistor taps per potentiometer  
End to end resistance 50kŸ or 100kŸ  
The DP7251 is four Digital Potentiometers  
(DPs) integrated with control logic and 16 bytes  
of NVRAM memory. Each DP consists of a series  
of resistive elements connected between two  
externally accessible end points. The tap points  
between each resistive element are connected to the  
wiper outputs with CMOS switches. A separate 8-bit  
control register (WCR) independently controls the  
wiper tap switches for each DP. Associated with  
each wiper control register are four 8-bit non-volatile  
memory data registers (DR) used for storing up to four  
wiper settings. Writing to the wiper control register or  
any of the non-volatile data registers is via a SPI serial  
bus. On power-up, the contents of the first data  
register (DR0) for each of the four potentiometers is  
automatically loaded into its respective wiper control  
register.  
Potentiometer control and memory access via  
SPI interface  
Low wiper resistance, typically 100Ÿ  
Nonvolatile memory storage for up to four  
wiper settings for each potentiometer  
Automatic recall of saved wiper settings at  
power up  
2.5 to 6.0 volt operation  
Standby current less than 1µA  
1,000,000 nonvolatile WRITE cycles  
100 year nonvolatile memory data retention  
SOIC 24-lead and TSSOP 24-lead  
Industrial temperature range  
The DP7251 can be used as a potentiometer or as a  
two terminal, variable resistor. It is intended for circuit  
level or system level adjustments in a wide variety of  
applications. It is available in the -40°C to 85°C  
industrial operating temperature range and offered in  
a 24-lead SOIC and TSSOP package.  
For Ordering Information details, see page 14.  
PIN CONFIGURATION  
FUNCTIONAL DIAGRAM  
SOIC 24-Lead (W)  
TSSOP 24-Lead (Y)  
¯¯¯¯¯  
HOLD  
SO  
A0  
1
2
3
4
5
6
7
8
9
24  
R
R
R
H2  
R
H3  
H0  
H1  
23 SCK  
22 RL2  
21 RH2  
20 RW2  
19 NC  
18 GND  
17 RW1  
16 RH1  
15 RL1  
14 A1  
CS  
SCK  
SI  
WIPER  
CONTROL  
REGISTERS  
RW3  
RH3  
RL3  
NC  
VCC  
RLO  
RHO  
SPI BUS  
INTERFACE  
R
W0  
SO  
R
R
R
W1  
W2  
W3  
DP  
7251  
WP  
A0  
A1  
NONVOLATILE  
DATA  
REGISTERS  
CONTROL  
LOGIC  
HOLD  
R
R
L1  
R
L2  
R
L3  
RWO 10  
L0  
¯¯¯  
CS  
11  
12  
¯¯¯  
WP  
13 SI  
© NIDEC COPAL ELECTRONICS CORP.  
Characteristics subject to change without notice  
1
Doc. No. MD-2017 Rev. F  

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