Datasheet > DMP57D5UV

DMP57D5UV

更新时间： 2024-11-25 09:54:15

品牌	Logo	应用领域
美台 - DIODES		/
页数	文件大小	规格书
5页	145K
描述
DUAL P-CHANNEL ENHANCEMENT MODE MOSFET

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DMP57D5UV 数据手册

DMP57D5UV

DUAL P-CHANNEL ENHANCEMENT MODE MOSFET

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Features

Mechanical Data

•

Low On-Resistance

ESD Protected Gate to 1kV

Low Input Capacitance

Fast Switching Speed

Lead Free By Design/RoHS Compliant (Note 2)

“Green” Device (Note 3)

Qualified to AEC-Q 101 Standards for High Reliability

•

Case: SOT-563

Case Material: Molded Plastic, "Green" Molding Compound.

UL Flammability Classification Rating 94V-0

Moisture Sensitivity: Level 1 per J-STD-020D

Terminals: Finish ⎯ Matte Tin annealed over Copper

leadframe. Solderable per MIL-STD-202, Method 208

Terminal Connections: See Diagram

Marking Information: See Page 3

Ordering Information: See Page 3

Weight: 0.006 grams (approximate)

•

G₁

S₁

D₂

SOT-563

G₂

S₂

D₁

TOP VIEW

Internal Schematic

ESD protected to 1kV

TOP VIEW

Maximum Ratings @T_A= 25°C unless otherwise specified

Characteristic

Symbol

V_DSS

V_GSS

I_D

Value

-50

Units

Drain-Source Voltage

Gate-Source Voltage

Drain Current (Note 2)

Continuous

±8

-160

Thermal Characteristics @T_A= 25°C unless otherwise specified

Characteristic

Total Power Dissipation (Note 1)

Thermal Resistance, Junction to Ambient (Note 1)

Operating and Storage Temperature Range

Symbol

P_D

R_θ

Value

400

313

Units

°C/W

°C

-55 to +150

T_J, T_STG

Electrical Characteristics @T_A= 25°C unless otherwise specified

Characteristic

OFF CHARACTERISTICS (Note 4)

Symbol Min Typ Max Unit

Test Condition

Drain-Source Breakdown Voltage

Zero Gate Voltage Drain Current

Gate-Body Leakage

-50

⎯

BV_DSS

I_DSS

⎯

-10

V_GS= 0V, I_D= -250μA

μA V_DS= -50V, V_GS= 0V

I_GSS

±500

V_GS= ±8V, V_DS= 0V

ON CHARACTERISTICS (Note 4)

Gate Threshold Voltage

-0.7

-1.0

V_GS(th)

⎯

4.6

6.0

V_DS= V_GS, I_D= -250μA

_GS= -4V, I_D= -100mA

V_GS= -2.5V, I_D= -80mA

V_DS= -5V, I_D= -100mA

V_GS= 0V, I_S= -100mA

⎯

100

Static Drain-Source On-Resistance

R_{DS (ON)}

Forward Transfer Admittance

Diode Forward Voltage

⏐Y_fs⏐

V_SD

⎯

-1.2

⎯

DYNAMIC CHARACTERISTICS

Input Capacitance

7.3

2.5

C_iss

C_oss

C_rss

⎯

Output Capacitance

_DS= -25V, V_GS= 0V, f = 1.0MHz

Reverse Transfer Capacitance

Notes:

1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which

can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.

2. No purposefully added lead.

3. Diodes Inc’s “Green” policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.

4. Short duration pulse test used to minimize self-heating effect.

1 of 5

www.diodes.com

April 2009

DMP57D5UV

Document number: DS31540 Rev. 3 - 2

12 3 4 5

中文翻译

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