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DM9328J/883 PDF预览

DM9328J/883

更新时间: 2024-11-06 15:45:11
品牌 Logo 应用领域
美国国家半导体 - NSC 输出元件逻辑集成电路触发器
页数 文件大小 规格书
6页 125K
描述
IC 93 SERIES, 8-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, CDIP16, CERAMIC, DIP-16, Shift Register

DM9328J/883 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.76
Is Samacsys:N其他特性:INDIVIDUAL CLOCK FOR EACH SHIFT REGISTER IN ADDITION TO COMMON CLOCK OPTION
计数方向:RIGHT系列:93
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.43 mm逻辑集成电路类型:SERIAL IN SERIAL OUT
位数:8功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):35 ns
认证状态:Not Qualified筛选级别:38535Q/M;38534H;883B
座面最大高度:5.08 mm子类别:Shift Registers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:20 MHz
Base Number Matches:1

DM9328J/883 数据手册

 浏览型号DM9328J/883的Datasheet PDF文件第2页浏览型号DM9328J/883的Datasheet PDF文件第3页浏览型号DM9328J/883的Datasheet PDF文件第4页浏览型号DM9328J/883的Datasheet PDF文件第5页浏览型号DM9328J/883的Datasheet PDF文件第6页 
June 1989  
9328/DM9328 Dual 8-Bit Shift Register  
General Description  
The ’9328 is a high speed serial storage element providing  
16 bits of storage in the form of two 8-bit registers. The  
multifunctional capability of this device is provided by sever-  
al features: 1) additional gating is provided at the input to  
both shift registers so that the input is easily multiplexed  
between two sources; 2) the clock of each register may be  
provided separately or together; 3) both the true and com-  
plementary outputs are provided from each 8-bit register,  
and both registers may be master cleared from a common  
input.  
Connection Diagram  
Logic Symbol  
Dual-In-Line Package  
TL/F/9793–1  
Order Number 9328DMQB, 9328FMQB or DM9328N  
See NS Package Number J16A, N16E or W16A  
TL/F/9793–2  
e
V
Pin 16  
CC  
e
GND  
Pin 8  
Pin Names  
Description  
S
Data Select Input  
Data Inputs  
D0, D1  
CP  
Clock Pulse Input (Active HIGH)  
Common (Pin 9)  
Separate (Pins 7 and 10)  
Master Reset Input (Active LOW)  
Last Stage Output  
MR  
Q7  
Q7  
Complementary Output  
C
1995 National Semiconductor Corporation  
TL/F/9793  
RRD-B30M115/Printed in U. S. A.  

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