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DM74S51 PDF预览

DM74S51

更新时间: 2024-11-14 22:54:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
3页 38K
描述
Dual 2-Wide 2-Input AND-OR-INVERT Gate

DM74S51 数据手册

 浏览型号DM74S51的Datasheet PDF文件第2页浏览型号DM74S51的Datasheet PDF文件第3页 
August 1986  
Revised April 2000  
DM74S51  
Dual 2-Wide 2-Input AND-OR-INVERT Gate  
General Description  
This device contains two independent combinations of  
gates each of which performs the logic AND-OR-INVERT  
function.  
Ordering Code:  
Order Number Package Number  
DM74S51N N14A  
Package Description  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Connection Diagram  
Function Table  
Y = AB + CD  
Inputs  
Output  
A
H
X
B
H
X
C
X
H
D
X
H
Y
L
L
All other  
H
combinations  
H = HIGH Logic Level  
L = LOW Logic Level  
X = Either LOW or HIGH Logic Level  
© 2000 Fairchild Semiconductor Corporation  
DS006454  
www.fairchildsemi.com  

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