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DM74S09 PDF预览

DM74S09

更新时间: 2024-11-25 22:54:35
品牌 Logo 应用领域
美国国家半导体 - NSC
页数 文件大小 规格书
4页 86K
描述
Quad 2-Input AND Gates with Open-Collector Outputs

DM74S09 数据手册

 浏览型号DM74S09的Datasheet PDF文件第2页浏览型号DM74S09的Datasheet PDF文件第3页浏览型号DM74S09的Datasheet PDF文件第4页 
June 1989  
DM74S09 Quad 2-Input AND Gates  
with Open-Collector Outputs  
General Description  
Pull-Up Resistor Equations  
b
This device contains four independent gates each of which  
performs the logic AND function. The open-collector out-  
puts require an external pull-up resistor for proper logical  
operation.  
V
CC  
(Min)  
V
OH  
e
R
MAX  
a
N
1
(I  
OH  
)
N
2
(I  
IH  
)
b
V
OL  
V
(Max)  
CC  
e
R
MIN  
b
I
N
(I )  
OL  
3
IL  
total maximum output high current for all  
e
outputs tied to pull-up resistor  
Where: N (I  
1
)
OH  
e
)
IH  
N
(I  
total maximum input high current for all  
2
inputs tied to pull-up resistor  
e
inputs tied to pull-up resistor  
N
(I  
IL  
)
total maximum input low current for all  
3
Connection Diagram  
Dual-In-Line Package  
TL/F/6465–1  
Order Number DM74S09N  
See NS Package Number N14A  
Function Table  
e
Y
AB  
Inputs  
Output  
Y
A
B
L
L
L
H
L
L
L
H
H
L
H
H
e
e
H
L
High Logic Level  
Low Logic Level  
C
1995 National Semiconductor Corporation  
TL/F/6465  
RRD-B30M105/Printed in U. S. A.  

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