5秒后页面跳转
DM74LS90N PDF预览

DM74LS90N

更新时间: 2024-11-25 22:31:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 64K
描述
Decade and Binary Counters

DM74LS90N 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.38
其他特性:DIVIDE BY 2 AND DIVIDE BY 5 FUNCTIONS计数方向:UP
系列:LSJESD-30 代码:R-PDIP-T14
JESD-609代码:e0长度:19.18 mm
负载/预设输入:YES逻辑集成电路类型:DECADE COUNTER
最大频率@ Nom-Sup:10000000 Hz最大I(ol):0.008 A
工作模式:ASYNCHRONOUS位数:3
功能数量:2端子数量:14
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):15 mA
传播延迟(tpd):60 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Counters
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:NEGATIVE EDGE
宽度:7.62 mm最小 fmax:32 MHz
Base Number Matches:1

DM74LS90N 数据手册

 浏览型号DM74LS90N的Datasheet PDF文件第2页浏览型号DM74LS90N的Datasheet PDF文件第3页浏览型号DM74LS90N的Datasheet PDF文件第4页浏览型号DM74LS90N的Datasheet PDF文件第5页浏览型号DM74LS90N的Datasheet PDF文件第6页 
August 1986  
Revised March 2000  
DM74LS90  
Decade and Binary Counters  
General Description  
Features  
Each of these monolithic counters contains four master-  
slave flip-flops and additional gating to provide a divide-by-  
two counter and a three-stage binary counter for which the  
count cycle length is divide-by-five for the DM74LS90.  
Typical power dissipation 45 mW  
Count frequency 42 MHz  
All of these counters have a gated zero reset and the  
DM74LS90 also has gated set-to-nine inputs for use in  
BCD nine’s complement applications.  
To use their maximum count length (decade or four bit  
binary), the B input is connected to the QA output. The  
input count pulses are applied to input A and the outputs  
are as described in the appropriate truth table. A symmetri-  
cal divide-by-ten count can be obtained from the  
DM74LS90 counters by connecting the QD output to the A  
input and applying the input count to the B input which  
gives a divide-by-ten square wave at output QA.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS90M  
DM74LS90N  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Reset/Count Truth Table  
Reset Inputs  
Output  
R0(1)  
R0(2)  
R9(1)  
R9(2) QD QC QB QA  
H
H
X
X
L
H
H
X
L
L
X
H
X
L
X
L
L
L
L
L
L
L
L
L
L
L
H
L
H
H
COUNT  
COUNT  
COUNT  
COUNT  
X
X
L
X
L
L
X
L
X
X
© 2000 Fairchild Semiconductor Corporation  
DS006381  
www.fairchildsemi.com  

DM74LS90N 替代型号

型号 品牌 替代类型 描述 数据表
SN74LS90N TI

类似代替

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS
SN74LS90DR TI

类似代替

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS
SN74LS90D TI

类似代替

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

与DM74LS90N相关器件

型号 品牌 获取价格 描述 数据表
DM74LS90N/A+ ETC

获取价格

Asynchronous Up Counter
DM74LS90N/B+ ETC

获取价格

Asynchronous Up Counter
DM74LS92J NSC

获取价格

IC,COUNTER,UP,MODULO-12,LS-TTL,DIP,14PIN,CERAMIC
DM74LS92J/A+ ETC

获取价格

Asynchronous Up Counter
DM74LS92N NSC

获取价格

IC,COUNTER,UP,MODULO-12,LS-TTL,DIP,14PIN,PLASTIC
DM74LS92N/A+ ETC

获取价格

Asynchronous Up Counter
DM74LS92N/B+ ETC

获取价格

Asynchronous Up Counter
DM74LS93 NSC

获取价格

Decade and Binary Counters
DM74LS93J TI

获取价格

IC,COUNTER,UP,4-BIT BINARY,LS-TTL,DIP,14PIN,CERAMIC
DM74LS93J/A+ ETC

获取价格

Asynchronous Up Counter