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DM74LS645N PDF预览

DM74LS645N

更新时间: 2024-02-23 16:14:32
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 55K
描述
Octal Bus Transceiver

DM74LS645N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:20
Reach Compliance Code:unknown风险等级:5.24
Is Samacsys:N其他特性:WITH DIRECTION CONTROL
系列:LSJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:12.8 mm
逻辑集成电路类型:BUS TRANSCEIVER湿度敏感等级:NOT SPECIFIED
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):15 ns
认证状态:COMMERCIAL座面最大高度:2.65 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

DM74LS645N 数据手册

 浏览型号DM74LS645N的Datasheet PDF文件第2页浏览型号DM74LS645N的Datasheet PDF文件第3页浏览型号DM74LS645N的Datasheet PDF文件第4页浏览型号DM74LS645N的Datasheet PDF文件第5页 
August 1986  
Revised March 2000  
DM74LS645  
Octal Bus Transceiver  
General Description  
Features  
These octal bus transceivers are designed for asynchro-  
nous two-way communication between data buses. The  
devices transmit data from the A bus to the B bus or from  
the B bus to the A bus depending upon the level at the  
direction control (DIR) input. The enable input (G) can be  
used to disable the device so that the buses are effectively  
isolated.  
Bi-directional bus transceivers in high-density 20-pin  
packages  
Hysteresis at bus inputs improves noise margins  
3-STATE outputs  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS645WM  
DM74LS645N  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Control  
Inputs  
DM74LS645  
G
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
H = HIGH Level  
L = LOW Level  
X = Irrelevant  
© 2000 Fairchild Semiconductor Corporation  
DS009056  
www.fairchildsemi.com  

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