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DM74LS574N PDF预览

DM74LS574N

更新时间: 2024-11-28 23:00:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路光电二极管驱动
页数 文件大小 规格书
6页 59K
描述
Octal D-Type Flip-Flop with 3-STATE Outputs

DM74LS574N 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP20,.3
针数:20Reach Compliance Code:unknown
风险等级:5.62系列:LS
JESD-30 代码:R-PDIP-T20JESD-609代码:e0
长度:26.075 mm逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:35000000 Hz最大I(ol):0.024 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):45 mA
传播延迟(tpd):28 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

DM74LS574N 数据手册

 浏览型号DM74LS574N的Datasheet PDF文件第2页浏览型号DM74LS574N的Datasheet PDF文件第3页浏览型号DM74LS574N的Datasheet PDF文件第4页浏览型号DM74LS574N的Datasheet PDF文件第5页浏览型号DM74LS574N的Datasheet PDF文件第6页 
March 1988  
Revised March 2000  
DM74LS574  
Octal D-Type Flip-Flop with 3-STATE Outputs  
General Description  
The DM74LS574 is a high speed low power octal flip-flop  
with a buffered common Clock (CP) and a buffered com-  
mon Output Enable (OE). The information presented to the  
D inputs is stored in the flip-flops on the LOW-to-HIGH  
Clock (CP) transition.  
This device is functionally identical to the DM74LS374  
except for the pinouts.  
Ordering Code:  
Order Number  
DM74LS574WM M20B  
DM74LS574N N20A  
Package Number Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
V
= Pin 20  
CC  
GND = Pin 10  
Truth Table  
Inputs  
Outputs  
Dn  
H
CP  
OE  
L
On  
H
L
L
L
X
X
H
Z
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
Z = High Impedance  
= HIGH-to-LOW Clock (CP) transition  
© 2000 Fairchild Semiconductor Corporation  
DS009815  
www.fairchildsemi.com  

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