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DM74LS573 PDF预览

DM74LS573

更新时间: 2024-11-27 23:00:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
5页 52K
描述
Octal D-Type Latch with 3-STATE Outputs

DM74LS573 数据手册

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October 1988  
Revised March 2000  
DM74LS573  
Octal D-Type Latch with 3-STATE Outputs  
General Description  
The DM74LS573 is a high speed octal latch with buffered  
common Latch Enable (LE) and buffered common Output  
Enable (OE) inputs.  
Features  
Inputs and outputs on opposite sides of package allow-  
ing easy interface with microprocessors  
Useful as input or output port for microprocessors  
Functionally identical to DM74LS373  
This device is functionally identical to the DM74LS373, but  
has different pinouts.  
Input clamp diodes limit high speed termination effects  
Fully TTL and CMOS compatible  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS573WM  
DM74LS573N  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
V
= Pin 20  
CC  
GND = Pin 10  
Pin Descriptions  
Function Tables  
Pin Names  
Description  
Output  
Latch  
Output  
D
D0–D7  
LE  
Data Inputs  
Enable  
Enable  
O
H
Latch Enable Input (Active HIGH)  
3-STATE Output Enable Input (Active LOW)  
3-STATE Latch Outputs  
L
L
H
H
L
H
L
OE  
L
O0–O7  
L
X
X
QO  
Z
H
X
L = LOW State  
H = HIGH State  
X = Don't Care  
Z = High Impedance State  
= Previous Condition of O  
Q
O
© 2000 Fairchild Semiconductor Corporation  
DS009814  
www.fairchildsemi.com  

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