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DM74LS55M PDF预览

DM74LS55M

更新时间: 2024-11-27 23:00:43
品牌 Logo 应用领域
美国国家半导体 - NSC 触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
6页 115K
描述
2-Wide, 4-Input AND-OR-INVERT Gate

DM74LS55M 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP14,.25Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.59
其他特性:4-4 INPUTS系列:LS
JESD-30 代码:R-PDSO-G14JESD-609代码:e0
长度:8.65 mm负载电容(CL):15 pF
逻辑集成电路类型:AND-OR-INVERT GATE最大I(ol):0.008 A
功能数量:1输入次数:8
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):1.3 mAProp。Delay @ Nom-Sup:15 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

DM74LS55M 数据手册

 浏览型号DM74LS55M的Datasheet PDF文件第2页浏览型号DM74LS55M的Datasheet PDF文件第3页浏览型号DM74LS55M的Datasheet PDF文件第4页浏览型号DM74LS55M的Datasheet PDF文件第5页浏览型号DM74LS55M的Datasheet PDF文件第6页 
April 1992  
DM54LS55/DM74LS55  
2-Wide, 4-Input AND-OR-INVERT Gate  
General Description  
This device contains a combination of AND-OR-INVERT  
functions. The internal gates are configured as two,  
four-input AND gates with their outputs connected to a  
two-input NOR gate.  
Connection Diagram  
Dual-In-Line Package  
TL/F/10174–1  
Order Number DM54LS55J, DM54LS55W, DM74LS55M or DM74LS55N  
See NS Package Number J14A, M14A, N14A or W14B  
Function Table  
e
a
Y
ABCD  
EFGH  
Inputs  
Output  
A
B
C
D
E
F
G
H
Y
H
H
H
H
X
X
X
X
L
X
X
X
X
H
H
H
H
L
All Other Combinations  
H
e
e
e
H
L
High Logic Level  
Low Logic Level  
X
Either Low or High Logic Level  
C
1995 National Semiconductor Corporation  
TL/F/10174  
RRD-B30M105/Printed in U. S. A.  

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