5秒后页面跳转
DM74LS51MX PDF预览

DM74LS51MX

更新时间: 2024-11-27 23:47:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
4页 50K
描述
2/2-input and 3/3-input AND-NOR Gate

DM74LS51MX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.150 INCH, MS-120, SOIC-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.49
Is Samacsys:N其他特性:ASYMMETRICAL I/PS
系列:LSJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:8.65 mm
逻辑集成电路类型:AND-OR-INVERT GATE最大I(ol):0.008 A
功能数量:2输入次数:6
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):2.8 mA
Prop。Delay @ Nom-Sup:18 ns传播延迟(tpd):18 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

DM74LS51MX 数据手册

 浏览型号DM74LS51MX的Datasheet PDF文件第2页浏览型号DM74LS51MX的Datasheet PDF文件第3页浏览型号DM74LS51MX的Datasheet PDF文件第4页 
August 1986  
Revised March 2000  
DM74LS51  
Dual 2-Wide 2-Input, 2-Wide 3-Input  
AND-OR-INVERT Gate  
General Description  
This device contains two independent combinations of  
gates each of which performs the logic AND-OR-INVERT  
function. Each package contains one 2-wide 2-input and  
one 2-wide 3-input AND-OR-INVERT gates.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS51M  
DM74LS51N  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Y1 = (A1) (B1) (C1) + (D1) (E1) (F1)  
Inputs  
Output  
A1  
H
B1  
H
C1  
H
D1  
X
E1  
X
F1  
X
Y1  
L
X
X
X
H
H
H
L
Other Combinations  
H
Y2 = ((A2) (B2) + (C2) (D2))  
Inputs  
Output  
A2  
B2  
H
C2  
X
D2  
X
Y2  
L
H
X
X
H
H
L
Other combinations  
H
H = HIGH Logic Level  
L = LOW Logic Level  
X = Either LOW or HIGH Logic Level  
© 2000 Fairchild Semiconductor Corporation  
DS006369  
www.fairchildsemi.com  

DM74LS51MX 替代型号

型号 品牌 替代类型 描述 数据表
DM74LS51M FAIRCHILD

功能相似

Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate

与DM74LS51MX相关器件

型号 品牌 获取价格 描述 数据表
DM74LS51N NSC

获取价格

DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATES
DM74LS51N FAIRCHILD

获取价格

Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate
DM74LS51N/A+ ETC

获取价格

2/2-input and 3/3-input AND-NOR Gate
DM74LS51N/B+ TI

获取价格

IC,LOGIC GATE,2/2-INPUT AND-NOR,LS-TTL,DIP,14PIN,PLASTIC
DM74LS51W TI

获取价格

IC,LOGIC GATE,2/2-INPUT AND-NOR,LS-TTL,FP,14PIN,CERAMIC
DM74LS521N TI

获取价格

LS SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, PDIP20, 0.300 INCH, PLASTIC, DIP-20
DM74LS521NA+ TI

获取价格

LS SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, PDIP20, 0.300 INCH, PLASTIC, DIP-20
DM74LS533 FAIRCHILD

获取价格

Octal Transparent Latch with 3-STATE Outputs
DM74LS533N FAIRCHILD

获取价格

Octal Transparent Latch with 3-STATE Outputs
DM74LS533WM FAIRCHILD

获取价格

Octal Transparent Latch with 3-STATE Outputs