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DM74LS266N PDF预览

DM74LS266N

更新时间: 2024-11-25 23:00:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
4页 48K
描述
Quad 2-Input Exclusive-NOR Gate with Open-Collector Outputs

DM74LS266N 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.56
系列:LSJESD-30 代码:R-PDIP-T14
JESD-609代码:e0长度:19.18 mm
逻辑集成电路类型:XNOR GATE最大I(ol):0.008 A
功能数量:4输入次数:2
端子数量:14最高工作温度:70 °C
最低工作温度:输出特性:OPEN-COLLECTOR
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):13 mA
Prop。Delay @ Nom-Sup:23 ns传播延迟(tpd):23 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

DM74LS266N 数据手册

 浏览型号DM74LS266N的Datasheet PDF文件第2页浏览型号DM74LS266N的Datasheet PDF文件第3页浏览型号DM74LS266N的Datasheet PDF文件第4页 
March 1989  
Revised March 2000  
DM74LS266  
Quad 2-Input Exclusive-NOR Gate  
with Open-Collector Outputs  
General Description  
This device contains four independent gates each of which  
performs the logic exclusive-NOR function. Outputs are  
open collector.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS266M  
DM74LS266N  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Inputs  
Outputs  
A
L
B
L
Y
H
L
L
H
L
H
H
L
H
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
© 2000 Fairchild Semiconductor Corporation  
DS010182  
www.fairchildsemi.com  

DM74LS266N 替代型号

型号 品牌 替代类型 描述 数据表
SN74LS266NE4 TI

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QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES WITH OPEN-COLLECTOR OUTPUTS

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