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DM74LS154WM PDF预览

DM74LS154WM

更新时间: 2024-09-20 23:00:43
品牌 Logo 应用领域
美国国家半导体 - NSC 解码器解复用器逻辑集成电路光电二极管输入元件驱动
页数 文件大小 规格书
6页 123K
描述
4-Line to 16-Line Decoders/Demultiplexers

DM74LS154WM 数据手册

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May 1989  
DM54LS154/DM74LS154 4-Line to 16-Line  
Decoders/Demultiplexers  
General Description  
Features  
Y
Decodes 4 binary-coded inputs into one of 16 mutually  
exclusive outputs  
Each of these 4-line-to-16-line decoders utilizes TTL circuit-  
ry to decode four binary-coded inputs into one of sixteen  
mutually exclusive outputs when both the strobe inputs, G1  
and G2, are low. The demultiplexing function is performed  
by using the 4 input lines to address the output line, passing  
data from one of the strobe inputs with the other strobe  
input low. When either strobe input is high, all outputs are  
high. These demultiplexers are ideally suited for implement-  
ing high-performance memory decoders. All inputs are buff-  
ered and input clamping diodes are provided to minimize  
transmission-line effects and thereby simplify system de-  
sign.  
Y
Performs the demultiplexing function by distributing data  
from one input line to any one of 16 outputs  
Input clamping diodes simplify system design  
High fan-out, low-impedance, totem-pole outputs  
Typical propagation delay  
Y
Y
Y
3 levels of logic 23 ns  
Strobe 19 ns  
Y
Typical power dissipation 45 mW  
Connection and Logic Diagrams  
Dual-In-Line Package  
TL/F/6394–1  
Order Number DM54LS154J,  
DM74LS154WM or DM74LS154N  
See NS Package Number J24A, M24B or N24A  
TL/F/6394–2  
C
1995 National Semiconductor Corporation  
TL/F/6394  
RRD-B30M105/Printed in U. S. A.  

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