Datasheet > 逻辑 > 栅极> DM74LS10

DM74LS10

更新时间： 2024-11-03 23:00:43

阅读下载

中文翻译

获取价格

如果您发现信息不准确，欢迎纠错

DM74LS10 数据手册

August 1986

Revised March 2000

DM74LS10

Triple 3-Input NAND Gate

General Description

This device contains three independent gates each of

which performs the logic NAND function.

Ordering Code:

Order Number Package Number

Package Description

DM74LS10M

DM74LS10N

M14A

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Y = ABC

Inputs

Output

H = HIGH Logic Level

L = LOW Logic Level

X = Either LOW or HIGH Logic Level

DS006349

www.fairchildsemi.com

12 3 4

中文翻译

下载PDF

型号	品牌	获取价格	描述	数据表
DM74LS107A	NSC	获取价格	Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Out
DM74LS107AM	NSC	获取价格	Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Out
DM74LS107AN	NSC	获取价格	Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Out
DM74LS107AN/A+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS107AN/B+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS107J	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,DIP,14PIN,CERAMIC
DM74LS107J/A+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS107N	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,DIP,14PIN,PLASTIC
DM74LS107N/A+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS107N/B+	ETC	获取价格	J-K-Type Flip-Flop