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DM74LS05N PDF预览

DM74LS05N

更新时间: 2024-11-03 23:00:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 65K
描述
Hex Inverters with Open-Collector Outputs

DM74LS05N 数据手册

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August 1986  
Revised March 2000  
DM74LS05  
Hex Inverters with Open-Collector Outputs  
General Description  
Pull-Up Resistor Equations  
This device contains six independent gates each of which  
performs the logic INVERT function. The open-collector  
outputs require external pull-up resistors for proper logical  
operation.  
Where:  
N1 (IOH) = total maximum output high current  
for all outputs tied to pull-up resistor  
N2 (IIH) = total maximum input high current for  
all inputs tied to pull-up resistor  
N3 (IIL) = total maximum input low current for  
all inputs tied to pull-up resistor  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS05M  
DM74LS05SJ  
DM74LS05N  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Y = A  
Input  
Output  
A
L
Y
H
L
H
H = HIGH Logic Level  
L = LOW Logic Level  
© 2000 Fairchild Semiconductor Corporation  
DS006346  
www.fairchildsemi.com  

DM74LS05N 替代型号

型号 品牌 替代类型 描述 数据表
SN74LS05N TI

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SN74LS05NE4 TI

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SN54LS05J TI

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