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DM74LS00W PDF预览

DM74LS00W

更新时间: 2024-11-03 22:54:35
品牌 Logo 应用领域
美国国家半导体 - NSC
页数 文件大小 规格书
6页 123K
描述
Quad 2-Input NAND Gates

DM74LS00W 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DFP, FL14,.3Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-XDFP-F14
JESD-609代码:e0逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A端子数量:14
最高工作温度:70 °C最低工作温度:
封装主体材料:CERAMIC封装代码:DFP
封装等效代码:FL14,.3封装形状:RECTANGULAR
封装形式:FLATPACK电源:5 V
最大电源电流(ICC):4.4 mAProp。Delay @ Nom-Sup:15 ns
认证状态:Not Qualified施密特触发器:NO
子类别:Gates标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL

DM74LS00W 数据手册

 浏览型号DM74LS00W的Datasheet PDF文件第2页浏览型号DM74LS00W的Datasheet PDF文件第3页浏览型号DM74LS00W的Datasheet PDF文件第4页浏览型号DM74LS00W的Datasheet PDF文件第5页浏览型号DM74LS00W的Datasheet PDF文件第6页 
June 1989  
54LS00/DM54LS00/DM74LS00  
Quad 2-Input NAND Gates  
General Description  
This device contains four independent gates each of which  
performs the logic NAND function.  
Features  
Y
Alternate Military/Aerospace device (54LS00) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6439–1  
Order Number 54LS00DMQB, 54LS00FMQB, 54LS00LMQB, DM54LS00J, DM54LS00W, DM74LS00M or DM74LS00N  
See NS Package Number E20A, J14A, M14A, N14A or W14B  
Function Table  
e
Y
AB  
Inputs  
Output  
Y
A
B
L
L
L
H
L
H
H
H
L
H
H
H
e
e
H
L
High Logic Level  
Low Logic Level  
C
1995 National Semiconductor Corporation  
TL/F/6439  
RRD-B30M105/Printed in U. S. A.  

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IC,LOGIC GATE,QUAD 2-INPUT NOR,LS-TTL,DIP,14PIN,CERAMIC