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DM74AS245WM PDF预览

DM74AS245WM

更新时间: 2024-09-29 22:53:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 67K
描述
Octal Bus Transceiver with 3-STATE Outputs

DM74AS245WM 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.39
Is Samacsys:N其他特性:WITH DIRECTION CONTROL
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:ASJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.048 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):149 mAProp。Delay @ Nom-Sup:7.5 ns
传播延迟(tpd):7.5 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:7.5 mmBase Number Matches:1

DM74AS245WM 数据手册

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October 1986  
Revised February 2000  
DM74AS245  
Octal Bus Transceiver with 3-STATE Outputs  
General Description  
This advanced Schottky device contains  
Features  
Advanced oxide-isolated, ion-implanted Schottky  
8
pairs of  
3-STATE logic elements configured as octal bus transceiv-  
ers. These circuits are designed for use in memory, micro-  
processor systems and in asynchronous bidirectional data  
buses. Two way communication between buses is con-  
trolled by the (DIR) input. Data transmits either from the A  
bus to the B bus or from the B bus to the A bus. Both the  
driver and receiver outputs can be disabled via the (G)  
enable input which causes outputs to enter the high imped-  
ance mode so that the buses are effectively isolated.  
TTL process  
Non-inverting logic output  
3-STATE outputs independently controlled on  
A and B buses  
Low output impedance to drive terminated transmission  
lines to 133Ω  
Switching response specified into 500/50 pF  
Specified to interface with CMOS at VOH = VCC 2V  
PNP inputs reduce input loading  
Switching specifications guaranteed over full  
temperature and VCC range  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74AS245WM  
DM74AS245SJ  
DM74AS245N  
M20B  
M20D  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Control  
Inputs  
Operation  
G
L
DIR  
L
B Data to A Bus  
A Data to B Bus  
Hi-Z  
L
H
H
X
© 2000 Fairchild Semiconductor Corporation  
DS006299  
www.fairchildsemi.com  

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