5秒后页面跳转
DM74ALS533 PDF预览

DM74ALS533

更新时间: 2024-11-04 22:56:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
6页 60K
描述
Octal D-Type Transparent Latch with 3-STATE Outputs

DM74ALS533 数据手册

 浏览型号DM74ALS533的Datasheet PDF文件第2页浏览型号DM74ALS533的Datasheet PDF文件第3页浏览型号DM74ALS533的Datasheet PDF文件第4页浏览型号DM74ALS533的Datasheet PDF文件第5页浏览型号DM74ALS533的Datasheet PDF文件第6页 
April 1984  
Revised February 2000  
DM74ALS533  
Octal D-Type Transparent Latch with 3-STATE Outputs  
General Description  
Features  
These 8-bit registers feature totem-pole 3-STATE outputs  
designed specifically for driving highly-capacitive or rela-  
tively low-impedance loads. The high-impedance state and  
increased high-logic-level drive provide these registers with  
the capability of being connected directly to and driving the  
bus lines in a bus-organized system without need for inter-  
face or pull-up components. They are particularly attractive  
for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers.  
Switching specifications at 50 pF  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
3-STATE buffer-type outputs drive bus lines directly  
The eight inverting latches of the DM74ALS533 are trans-  
parent D-type latches. While the enable (G) is HIGH the Q  
outputs will follow the complement of the data (D) inputs.  
When the enable is taken LOW the output will be latched at  
the complement of the level of the data that was set up.  
A buffered output control input can be used to place the  
eight outputs in either a normal logic state (HIGH or LOW  
logic levels) or a high-impedance state. In the high-imped-  
ance state the outputs neither load nor drive the bus lines  
significantly.  
The output control does not affect the internal operation of  
the latches. That is, the old data can be retained or new  
data can be entered even while the outputs are OFF.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74ALS533WM  
DM74ALS533N  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
© 2000 Fairchild Semiconductor Corporation  
DS006222  
www.fairchildsemi.com  

与DM74ALS533相关器件

型号 品牌 获取价格 描述 数据表
DM74ALS533J NSC

获取价格

IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,CERAMIC
DM74ALS533J/A+ ETC

获取价格

8-Bit D-Type Latch
DM74ALS533N FAIRCHILD

获取价格

Octal D-Type Transparent Latch with 3-STATE Outputs
DM74ALS533N/A+ ETC

获取价格

8-Bit D-Type Latch
DM74ALS533N/B+ ETC

获取价格

8-Bit D-Type Latch
DM74ALS533WM FAIRCHILD

获取价格

Octal D-Type Transparent Latch with 3-STATE Outputs
DM74ALS533WM/A+ ETC

获取价格

8-Bit D-Type Latch
DM74ALS533WM/B+ ETC

获取价格

8-Bit D-Type Latch
DM74ALS533WMX FAIRCHILD

获取价格

8-Bit D-Type Latch
DM74ALS533WMX_NL FAIRCHILD

获取价格

Bus Driver, ALS Series, 1-Func, 8-Bit, Inverted Output, TTL, PDSO20, 0.300 INCH, MS-013, S