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DM74ALS38AMX PDF预览

DM74ALS38AMX

更新时间: 2024-01-20 08:02:00
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路光电二极管
页数 文件大小 规格书
4页 51K
描述
Quad 2-input NAND Gate

DM74ALS38AMX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP14,.3Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDIP-T14
JESD-609代码:e0逻辑集成电路类型:NAND GATE
端子数量:14最高工作温度:70 °C
最低工作温度:输出特性:OPEN-COLLECTOR
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:5 V
认证状态:Not Qualified施密特触发器:NO
子类别:Gates标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

DM74ALS38AMX 数据手册

 浏览型号DM74ALS38AMX的Datasheet PDF文件第2页浏览型号DM74ALS38AMX的Datasheet PDF文件第3页浏览型号DM74ALS38AMX的Datasheet PDF文件第4页 
September 1986  
Revised February 2000  
DM74ALS38A  
Quadruple 2-Input NAND Buffer  
with Open-Collector Outputs  
General Description  
Features  
Switching specifications at 50 pF  
This device contains four independent gates, each of which  
performs the logic NAND function. The open-collector out-  
puts require external pull-up resistors for proper logical  
operation.  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Pull-Up Resistor Equations  
Functionally and pin for pin compatible with LS TTL  
counterpart  
Improved AC performance over LS38  
Improved line receiving characteristics  
Where:  
N1 (IOH) = total maximum output HIGH current  
for all outputs tied to pull-up resistor  
N2 (IIH) = total maximum input HIGH current  
for all inputs tied to pull-up resistor  
N3 (IIL) = total maximum input LOW current for  
all inputs tied to pull-up resistor  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74ALS38AM  
DM74ALS38AN  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Y = AB  
Inputs  
Output  
A
L
B
L
Y
H
H
H
L
L
H
L
H
H
H
H = HIGH Logic Level  
L = LOW Logic Level  
© 2000 Fairchild Semiconductor Corporation  
DS006193  
www.fairchildsemi.com  

DM74ALS38AMX 替代型号

型号 品牌 替代类型 描述 数据表
DM74ALS38AM FAIRCHILD

完全替代

Quadruple 2-Input NAND Buffer with Open-Collector Outputs
SN74ALS38BDR TI

功能相似

Quad 2-input positive-NAND buffers with open collector outputs 14-SOIC 0 to 70
SN74ALS38BD TI

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QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

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