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DM74ALS30A PDF预览

DM74ALS30A

更新时间: 2024-01-06 11:31:08
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
5页 63K
描述
8-Input NAND Gate

DM74ALS30A 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP14,.3Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDIP-T14
JESD-609代码:e0逻辑集成电路类型:NAND GATE
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 VProp。Delay @ Nom-Sup:15 ns
认证状态:Not Qualified施密特触发器:NO
子类别:Gates标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

DM74ALS30A 数据手册

 浏览型号DM74ALS30A的Datasheet PDF文件第2页浏览型号DM74ALS30A的Datasheet PDF文件第3页浏览型号DM74ALS30A的Datasheet PDF文件第4页浏览型号DM74ALS30A的Datasheet PDF文件第5页 
September 1986  
Revised February 2000  
DM74ALS30A  
8-Input NAND Gate  
General Description  
This device contains a single gate, which performs the  
Features  
Switching specifications at 50 pF  
logic NAND function.  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Functionally and pin for pin compatible with Schottky  
and low power Schottky TTL counterpart  
Improved AC performance over Schottky and low power  
Schottky counterparts  
Ordering Code:  
Order Number  
DM74ALS30AM  
DM74ALS30ASJ  
DM74ALS30AN  
Package Number Package Description  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Y = ABCDEFGH  
Inputs  
Output  
A thru H  
All Inputs H  
One or More  
Input L  
Y
L
H
H = HIGH Logic Level  
L = LOW Logic Level  
© 2000 Fairchild Semiconductor Corporation  
DS006189  
www.fairchildsemi.com  

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