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DM74ALS1240A PDF预览

DM74ALS1240A

更新时间: 2024-11-08 22:56:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器
页数 文件大小 规格书
4页 43K
描述
Octal 3-STATE Bus Driver

DM74ALS1240A 数据手册

 浏览型号DM74ALS1240A的Datasheet PDF文件第2页浏览型号DM74ALS1240A的Datasheet PDF文件第3页浏览型号DM74ALS1240A的Datasheet PDF文件第4页 
September 1986  
Revised February 2000  
DM74ALS1240A  
Octal 3-STATE Bus Driver  
General Description  
Features  
These octal 3-STATE bus drivers are designed to provide  
the designer with flexibility in implementing a bus interface  
with memory, microprocessor, or communication systems,  
and are low power dissipation versions of the  
DM74ALS240A and DM74ALS241A. The output 3-STATE  
gating control is organized into two separate groups of four  
buffers. The DM74ALS1240A control inputs symmetrically  
enable the respective outputs when set logic LOW. The 3-  
STATE circuitry contains a feature that maintains the buffer  
outputs in 3-STATE (high impedance state) during power  
supply ramp-up or ramp-down. This eliminates bus glitch-  
ing problems that arise during power-up and power-down.  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Switching response specified into 500and 50 pF load  
Switching response specifications guaranteed over full  
temperature and VCC supply range  
PNP input design reduces input loading  
Low power dissipation version  
Low level drive current: 74ALS = 16 mA  
Ordering Code:  
Order Number  
Package Number  
Package Description  
DM74ALS1240AWM  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Diagram  
Function Table  
Input  
Output  
G
L
A
L
Y
H
L
L
H
X
H
Z
H = HIGH Level Logic State  
L = LOW Level Logic State  
X = Don't Care (Either LOW or HIGH Level Logic State)  
Z = High Impedance (OFF) State  
© 2000 Fairchild Semiconductor Corporation  
DS006261  
www.fairchildsemi.com  

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