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DM74ALS09N PDF预览

DM74ALS09N

更新时间: 2024-09-20 22:54:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
4页 51K
描述
Quad 2-Input AND Gate with Open Collector Outputs

DM74ALS09N 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.47
系列:ALSJESD-30 代码:R-PDIP-T14
JESD-609代码:e3长度:19.18 mm
逻辑集成电路类型:AND GATE最大I(ol):0.008 A
功能数量:4输入次数:2
端子数量:14最高工作温度:70 °C
最低工作温度:输出特性:OPEN-COLLECTOR
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT APPLICABLE
电源:5 V最大电源电流(ICC):4 mA
Prop。Delay @ Nom-Sup:54 ns传播延迟(tpd):54 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm

DM74ALS09N 数据手册

 浏览型号DM74ALS09N的Datasheet PDF文件第2页浏览型号DM74ALS09N的Datasheet PDF文件第3页浏览型号DM74ALS09N的Datasheet PDF文件第4页 
September 1986  
Revised February 2000  
DM74ALS09  
Quad 2-Input AND Gate with Open Collector Outputs  
General Description  
Features  
This device contains four independent gates, each of which  
performs the logic AND function. The open-collector out-  
puts require external pull-up resistors for proper logical  
operation.  
Switching specifications at 50 pF  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Pull-Up Resistor Equations  
Functionally and pin for pin compatible with Schottky  
and low power Schottky TTL counterpart  
Improved AC performance over Schottky and low power  
Schottky counterparts  
Where:  
N1 (IOH) = total maximum output HIGH current  
for all outputs tied to pull-up resistor  
N2 (IIH) = total maximum input HIGH current  
for all inputs tied to pull-up resistor  
N3 (IIL) = total maximum input LOW current for  
all inputs tied to pull-up resistor  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74ALS09M  
DM74ALS09N  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Y = AB  
Inputs  
Output  
A
L
B
L
Y
L
L
H
L
L
H
H
L
H
H
H = HIGH Logic Level  
L = LOW Logic Level  
© 2000 Fairchild Semiconductor Corporation  
DS006179  
www.fairchildsemi.com  

DM74ALS09N 替代型号

型号 品牌 替代类型 描述 数据表
DM74ALS08N FAIRCHILD

完全替代

Quad 2-Input AND Gate
DM74ALS02N FAIRCHILD

完全替代

Quad 2-Input NOR Gate
SN74ALS02AN TI

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