是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | DIP, DIP14,.3 | Reach Compliance Code: | unknown |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.66 |
其他特性: | 2 EXPAND INPUTS FOR 1 FUNCTION | 系列: | TTL/H/L |
JESD-30 代码: | R-PDIP-T14 | JESD-609代码: | e0 |
长度: | 19.18 mm | 负载电容(CL): | 15 pF |
逻辑集成电路类型: | AND-OR-INVERT GATE | 最大I(ol): | 0.016 A |
功能数量: | 2 | 输入次数: | 4 |
端子数量: | 14 | 最高工作温度: | 70 °C |
最低工作温度: | 封装主体材料: | PLASTIC/EPOXY | |
封装代码: | DIP | 封装等效代码: | DIP14,.3 |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
峰值回流温度(摄氏度): | NOT SPECIFIED | 电源: | 5 V |
最大电源电流(ICC): | 14 mA | Prop。Delay @ Nom-Sup: | 30 ns |
传播延迟(tpd): | 15 ns | 认证状态: | Not Qualified |
施密特触发器: | NO | 座面最大高度: | 5.08 mm |
子类别: | Gates | 最大供电电压 (Vsup): | 5.25 V |
最小供电电压 (Vsup): | 4.75 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | TTL |
温度等级: | COMMERCIAL | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | THROUGH-HOLE | 端子节距: | 2.54 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 7.62 mm |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
DM7450N/A+ | ETC |
获取价格 |
Dual 2/2-input AND-NOR Gate | |
DM7450N/B+ | ETC |
获取价格 |
Dual 2/2-input AND-NOR Gate | |
DM7450W | ETC |
获取价格 |
Dual 2/2-input AND-NOR Gate | |
DM7451 | NSC |
获取价格 |
Dual 2-Wide, 2-Input AOI Gate | |
DM7451J | ROCHESTER |
获取价格 |
AND-OR-Invert Gate | |
DM7451J | TI |
获取价格 |
IC,LOGIC GATE,2 2/2-IN AND-NOR,STD-TTL,DIP,14PIN,CERAMIC | |
DM7451J/A+ | TI |
获取价格 |
IC,LOGIC GATE,2 2/2-IN AND-NOR,STD-TTL,DIP,14PIN,CERAMIC | |
DM7451N | ROCHESTER |
获取价格 |
AND-OR-Invert Gate, TTL/H/L Series, 2-Func, 4-Input, TTL, CDFP14, CERAMIC, DFP-14 | |
DM7451N | TI |
获取价格 |
TTL/H/L SERIES, DUAL 4-INPUT AND-OR-INVERT GATE, CDFP14, CERAMIC, DFP-14 | |
DM7451N/A+ | TI |
获取价格 |
IC,LOGIC GATE,2 2/2-IN AND-NOR,STD-TTL,DIP,14PIN,PLASTIC |