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DM54LS20J PDF预览

DM54LS20J

更新时间: 2024-11-23 22:56:47
品牌 Logo 应用领域
美国国家半导体 - NSC 栅极触发器逻辑集成电路
页数 文件大小 规格书
6页 127K
描述
Dual 4-Input NAND Gates

DM54LS20J 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:CERAMIC, DIP-14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.59
Is Samacsys:N系列:LS
JESD-30 代码:R-GDIP-T14JESD-609代码:e0
长度:19.43 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.004 A
功能数量:2输入次数:4
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):2.2 mAProp。Delay @ Nom-Sup:15 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

DM54LS20J 数据手册

 浏览型号DM54LS20J的Datasheet PDF文件第2页浏览型号DM54LS20J的Datasheet PDF文件第3页浏览型号DM54LS20J的Datasheet PDF文件第4页浏览型号DM54LS20J的Datasheet PDF文件第5页浏览型号DM54LS20J的Datasheet PDF文件第6页 
June 1989  
54LS20/DM54LS20/DM74LS20 Dual 4-Input NAND Gates  
General Description  
This device contains two independent gates each of which  
performs the logic NAND function.  
Features  
Y
Alternate Military/Aerospace device (54LS20) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications  
Connection Diagram  
Dual-In-Line Package  
TL/F/6355–1  
Order Number 54LS20DMQB, 54LS20FMQB, 54LS20LMQB,  
DM54LS20J, DM54LS20W, DM74LS20M or DM74LS20N  
See NS Package Number E20A, J14A, M14A, N14A or W14B  
Function Table  
e
Y
ABCD  
Inputs  
Output  
Y
A
B
C
D
X
X
X
L
X
X
L
X
L
L
X
X
X
H
H
H
H
H
L
X
X
H
X
H
H
e
e
e
H
L
High Logic Level  
Low Logic Level  
X
Either Low or High Logic Level  
C
1995 National Semiconductor Corporation  
TL/F/6355  
RRD-B30M105/Printed in U. S. A.  

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