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DM54LS138W-MIL PDF预览

DM54LS138W-MIL

更新时间： 2024-11-19 12:59:19
品牌 Logo 应用领域
美国国家半导体 - NSC 解码器解复用器
页数 文件大小 规格书
8页 167K
描述
IC,DECODER/DEMUX,3-TO-8-LINE,LS-TTL,FP,16PIN,CERAMIC

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中文翻译

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DM54LS138W-MIL 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DFP, FL16,.3Reach Compliance Code：compliant
风险等级：5.9JESD-30 代码：R-XDFP-F16
JESD-609代码：e0逻辑集成电路类型：OTHER DECODER/DRIVER
最大I（ol）：0.004 A功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：CERAMIC
封装代码：DFP封装等效代码：FL16,.3
封装形状：RECTANGULAR封装形式：FLATPACK
电源：5 V最大电源电流（ICC）：10 mA
Prop。Delay @ Nom-Sup：41 ns认证状态：Not Qualified
筛选级别：MIL-STD-883 Class B (Modified)子类别：Decoder/Drivers
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：TTL温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
Base Number Matches：1

DM54LS138W-MIL 数据手册

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June 1989  
54LS138/DM54LS138/DM74LS138,  
54LS139/DM54LS139/DM74LS139  
Decoders/Demultiplexers  
General Description  
These Schottky-clamped circuits are designed to be used in  
high-performance memory-decoding or data-routing appli-  
cations, requiring very short propagation delay times. In  
high-performance memory systems these decoders can be  
used to minimize the effects of system decoding. When  
used with high-speed memories, the delay times of these  
decoders are usually less than the typical access time of the  
memory. This means that the effective system delay intro-  
duced by the decoder is negligible.  
Schottky diodes to suppress line-ringing and simplify system  
design.  
Features  
Y
Designed specifically for high speed:  
Memory decoders  
Data transmission systems  
Y
LS138 3-to-8-line decoders incorporates 3 enable in-  
puts to simplify cascading and/or data reception  
The LS138 decodes one-of-eight lines, based upon the con-  
ditions at the three binary select inputs and the three enable  
inputs. Two active-low and one active-high enable inputs  
reduce the need for external gates or inverters when ex-  
panding. A 24-line decoder can be implemented with no ex-  
ternal inverters, and a 32-line decoder requires only one  
inverter. An enable input can be used as a data input for  
demultiplexing applications.  
Y
LS139 contains two fully independent 2-to-4-line decod-  
ers/demultiplexers  
Y
Schottky clamped for high performance  
Y
Typical propagation delay (3 levels of logic)  
LS138 21 ns  
LS139 21 ns  
Y
Typical power dissipation  
LS138 32 mW  
LS139 34 mW  
The LS139 comprises two separate two-line-to-four-line de-  
coders in a single package. The active-low enable input can  
be used as a data line in demultiplexing applications.  
Y
Alternate  
Military/Aerospace  
devices  
(54LS138,  
54LS139) are available. Contact a National Semicon-  
ductor Sales Office/Distributor for specifications.  
All of these decoders/demultiplexers feature fully buffered  
inputs, presenting only one normalized load to its driving  
circuit. All inputs are clamped with high-performance  
Connection Diagrams  
Dual-in-Line Package  
Dual-in-Line Package  
TL/F/6391–1  
Order Number 54LS138DMQB, 54LS138FMQB,  
54LS138LMQB, DM54LS138J, DM54LS138W,  
DM74LS138M or DM74LS138N  
TL/F/6391–2  
Order Number 54LS139DMQB, 54LS139FMQB,  
54LS139LMQB, DM54LS139J, DM54LS139W,  
DM74LS139M or DM74LS139N  
See NS Package Number E20A, J16A,  
M16A, N16E or W16A  
See NS Package Number E20A, J16A,  
M16A, N16E or W16A  
C
1995 National Semiconductor Corporation  
TL/F/6391  
RRD-B30M105/Printed in U. S. A.  
12345678

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DM54LS139J/883 TI

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DM54LS139M NSC

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DM54LS139N NSC

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 		Decoders/Demultiplexers
DM54LS139W NSC

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DM54LS139W/883 TI

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 		IC LS SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, Decoder/Driver
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 		Decoder/Driver

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